On Tue 14 Dec 2021 at 10:21, Qianggui Song <qianggui.song@xxxxxxxxxxx> wrote: > Add new pinctrl driver for Amlogic's Meson-S4 SoC which share the > same register laytout as the previous Meson-A1. > > Signed-off-by: Qianggui Song <qianggui.song@xxxxxxxxxxx> > --- [...] > + > +/* Bank D func1 */ > +static const unsigned int uart_b_tx_d_pins[] = { GPIOD_0 }; > +static const unsigned int uart_b_rx_d_pins[] = { GPIOD_1 }; > +static const unsigned int uart_b_cts_d_pins[] = { GPIOD_2 }; > +static const unsigned int uart_b_rts_d_pins[] = { GPIOD_3 }; Your S805x2 documenation says the 4 pins above are HDMI related for func 1 > +static const unsigned int remote_out_pins[] = { GPIOD_4 }; > +static const unsigned int remote_in_pins[] = { GPIOD_5 }; SPDIF for those 2 > +static const unsigned int jtag_1_clk_pins[] = { GPIOD_6 }; > +static const unsigned int jtag_1_tms_pins[] = { GPIOD_7 }; > +static const unsigned int jtag_1_tdi_pins[] = { GPIOD_8 }; > +static const unsigned int jtag_1_tdo_pins[] = { GPIOD_9 }; I2C for those 4 It goes on like this for the rest of GPIO Bank D and I did not check the other banks Could you please clarify * Does the S4 applies to S805X2, S905Y4, Both ? * Is the S805X2 Datasheet Revision 0.4 accurate ? > +static const unsigned int clk12_24_pins[] = { GPIOD_10 }; > +static const unsigned int pwm_g_hiz_pins[] = { GPIOD_11 }; > + [...] > + > +static const char * const tdm_groups[] = { > + "tdm_d2_c", "tdm_d3_c", "tdm_fs1_c", "tdm_d4_c", "tdm_d5_c", > + "tdm_fs1_d", "tdm_d4_d", "tdm_d3_d", "tdm_d2_d", "tdm_sclk1_d", > + "tdm_sclk1_h", "tdm_fs1_h", "tdm_d2_h", "tdm_d3_h", "tdm_d4_h", > + "tdm_d1", "tdm_d0", "tdm_fs0", "tdm_sclk0", "tdm_fs2", "tdm_sclk2", > + "tdm_d4_z", "tdm_d5_z", "tdm_d6", "tdm_d7" > +}; On previous chip, there were pin assigned to tdm A, B or C. On this generation, it seems you have added a second level on pinmuxing to re-route the audio pins to different controllers In such case, I don't think they belong in the same group. Depending on settins, D2 and D3 could be unrelated I think each audio pin should have its own group (one group for D3, one D4, etc ...) > + > +static const char * const mclk_groups[] = { > + "mclk_1_c", "mclk_1_d", "mclk_1_h", "mclk_2" > + > +}; mclk_1 and mclk_2 should be in separate groups > + > +static const char * const remote_out_groups[] = { > + "remote_out" > +}; > + > +static const char * const remote_in_groups[] = { > + "remote_in" > +}; > + > +static const char * const clk12_24_groups[] = { > + "clk12_24" > +}; > + > +static const char * const clk_32k_in_groups[] = { > + "clk_32k_in" > +}; > + > +static const char * const pwm_a_hiz_groups[] = { > + "pwm_a_hiz" > +}; > + I'm curious to know what the pwm hiz function is ?