Re: [PATCH V6] gpio: virtio: Add IRQ support

[Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>]

Hi Viresh,

On Thu, Oct 21, 2021 at 12:49 PM Viresh Kumar <viresh.kumar@xxxxxxxxxx> wrote:
> On 21-10-21, 12:07, Geert Uytterhoeven wrote:
> > On Thu, Oct 21, 2021 at 11:52 AM Viresh Kumar <viresh.kumar@xxxxxxxxxx> wrote:
> > > The structure will get aligned to the size of largest element and each
> > > element will be aligned to itself. I don't see how this will break
> > > even in case of 32/64 bit communication.
> >
> > Structures are not aligned to the size of the largest element, but
> > to the largest alignment needed for each member.
>
> Right, I was talking in terms of the structures we have here for GPIO.
> The biggest member here (for any structure) is 32bits long, and
> compiler shouldn't add extra padding here.
>
> > This can be smaller than the size of the largest element.
> > E.g. alignof(long long) might be 4, not 8.
>
> Right.
>
> > And m68k aligns to two bytes at most.
>
> Interesting, I assumed that it will be 4bytes for 32 bit systems. So
> in case of m68k, we will see something like this ?
>
> struct foo {
>     u8 a;       // aligned to 2 bytes
>
>                 // padding of 1 byte
>
>     u32 b;      // aligned to 2 bytes
> }

Exactly.  And on CRIS (no longer supported by Linux), there won't
be any padding.

So I recommend to always add explicit padding, to make sure all
members are aligned naturally on all systems.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds