[pinctrl:devel 15/21] drivers/pinctrl/mediatek/pinctrl-mtk-common.c:137:12: warning: variable 'offset' is uninitialized when used here

[kernel test robot <lkp@xxxxxxxxx>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
head:   07d5136f9bf1fa6abe70a1f88b04c1216fbf87a2
commit: 9f940d8ecf921d2638b05da60eec0d25459be170 [15/21] pinctrl: mediatek: don't hardcode mode encoding in common code
config: arm-randconfig-r034-20210528 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 6505c630407c5feec818f0bb1c284f9eeebf2071)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm cross compiling tool for clang build
        # apt-get install binutils-arm-linux-gnueabi
        # https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/commit/?id=9f940d8ecf921d2638b05da60eec0d25459be170
        git remote add pinctrl https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git
        git fetch --no-tags pinctrl devel
        git checkout 9f940d8ecf921d2638b05da60eec0d25459be170
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All warnings (new ones prefixed by >>):

>> drivers/pinctrl/mediatek/pinctrl-mtk-common.c:137:12: warning: variable 'offset' is uninitialized when used here [-Wuninitialized]
           bit = BIT(offset & pctl->devdata->mode_mask);
                     ^~~~~~
   include/vdso/bits.h:7:30: note: expanded from macro 'BIT'
   #define BIT(nr)                 (UL(1) << (nr))
                                              ^~
   drivers/pinctrl/mediatek/pinctrl-mtk-common.c:111:31: note: initialize the variable 'offset' to silence this warning
           unsigned int reg_addr, offset;
                                        ^
                                         = 0
   1 warning generated.


vim +/offset +137 drivers/pinctrl/mediatek/pinctrl-mtk-common.c

   107	
   108	static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin,
   109			int value, enum pin_config_param arg)
   110	{
   111		unsigned int reg_addr, offset;
   112		unsigned int bit;
   113	
   114		/**
   115		 * Due to some soc are not support ies/smt config, add this special
   116		 * control to handle it.
   117		 */
   118		if (!pctl->devdata->spec_ies_smt_set &&
   119			pctl->devdata->ies_offset == MTK_PINCTRL_NOT_SUPPORT &&
   120				arg == PIN_CONFIG_INPUT_ENABLE)
   121			return -EINVAL;
   122	
   123		if (!pctl->devdata->spec_ies_smt_set &&
   124			pctl->devdata->smt_offset == MTK_PINCTRL_NOT_SUPPORT &&
   125				arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE)
   126			return -EINVAL;
   127	
   128		/*
   129		 * Due to some pins are irregular, their input enable and smt
   130		 * control register are discontinuous, so we need this special handle.
   131		 */
   132		if (pctl->devdata->spec_ies_smt_set) {
   133			return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin),
   134				pin, pctl->devdata->port_align, value, arg);
   135		}
   136	
 > 137		bit = BIT(offset & pctl->devdata->mode_mask);
   138	
   139		if (arg == PIN_CONFIG_INPUT_ENABLE)
   140			offset = pctl->devdata->ies_offset;
   141		else
   142			offset = pctl->devdata->smt_offset;
   143	
   144		if (value)
   145			reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
   146		else
   147			reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl);
   148	
   149		regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit);
   150		return 0;
   151	}
   152	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

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