Re: [PATCH v10 09/23] dt-binding: clock: Document canaan,k210-clk bindings

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Quoting Damien Le Moal (2020-12-13 05:50:42)
> diff --git a/include/dt-bindings/clock/k210-clk.h b/include/dt-bindings/clock/k210-clk.h
> index 5a2fd64d1a49..b2de702cbf75 100644
> --- a/include/dt-bindings/clock/k210-clk.h
> +++ b/include/dt-bindings/clock/k210-clk.h
> @@ -3,18 +3,51 @@
>   * Copyright (C) 2019-20 Sean Anderson <seanga2@xxxxxxxxx>
>   * Copyright (c) 2020 Western Digital Corporation or its affiliates.
>   */
> -#ifndef K210_CLK_H
> -#define K210_CLK_H
> +#ifndef CLOCK_K210_CLK_H
> +#define CLOCK_K210_CLK_H
>  
>  /*
> - * Arbitrary identifiers for clocks.
> - * The structure is: in0 -> pll0 -> aclk -> cpu
> - *
> - * Since we use the hardware defaults for now, set all these to the same clock.
> + * Kendryte K210 SoC clock identifiers (arbitrary values).
>   */
> -#define K210_CLK_PLL0   0
> -#define K210_CLK_PLL1   0
> -#define K210_CLK_ACLK   0
> -#define K210_CLK_CPU    0

This seems to open a bisection hole. I see that ACLK is used in the
existing dtsi file, and that is the same as CLK_CPU, but after this
patch it will change to not exist anymore. Can we leave ACLK around
defined to be 0? I imagine it won't be used in the future so we can
remove it later. I can then apply this for v5.11-rc1 and then merge the
clk driver patch in clk tree.

> +#define K210_CLK_CPU   0
> +#define K210_CLK_SRAM0 1
> +#define K210_CLK_SRAM1 2




[Index of Archives]     [Linux SPI]     [Linux Kernel]     [Linux ARM (vger)]     [Linux ARM MSM]     [Linux Omap]     [Linux Arm]     [Linux Tegra]     [Fedora ARM]     [Linux for Samsung SOC]     [eCos]     [Linux Fastboot]     [Gcc Help]     [Git]     [DCCP]     [IETF Announce]     [Security]     [Linux MIPS]     [Yosemite Campsites]

  Powered by Linux