Re: [PATCH v2 4/4] pinctrl: amd: remove debounce filter setting in irq type setting

[Andy Shevchenko <andy.shevchenko@xxxxxxxxx>]

On Thu, Nov 5, 2020 at 1:07 AM Coiby Xu <coiby.xu@xxxxxxxxx> wrote:
>
> Debounce filter setting should be independent from irq type setting
> because according to the ACPI specs, there are separate arguments for
> specifying debounce timeout and irq type in GpioIo and GpioInt.

irq -> IRQ
GpioIo()
GpioInt()

> This will fix broken touchpads for Lenovo Legion-5 AMD gaming laptops
> including 15ARH05 (R7000) and R7000P whose BIOS set the debounce timeout
> to 124.8ms which led to the kernel receiving only ~7 HID reports per
> second.

Reviewed-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>

> Cc: Hans de Goede <hdegoede@xxxxxxxxxx>
> Cc: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
> Cc: Benjamin Tissoires <benjamin.tissoires@xxxxxxxxxx>
> BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190
> Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/
> Signed-off-by: Coiby Xu <coiby.xu@xxxxxxxxx>
> ---
>  drivers/pinctrl/pinctrl-amd.c | 7 -------
>  1 file changed, 7 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index e9b761c2b77a..2d4acf21117c 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -468,7 +468,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>                 pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>                 pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>                 pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
> -               pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>                 irq_set_handler_locked(d, handle_edge_irq);
>                 break;
>
> @@ -476,7 +475,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>                 pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>                 pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>                 pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
> -               pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>                 irq_set_handler_locked(d, handle_edge_irq);
>                 break;
>
> @@ -484,7 +482,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>                 pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>                 pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>                 pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
> -               pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>                 irq_set_handler_locked(d, handle_edge_irq);
>                 break;
>
> @@ -492,8 +489,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>                 pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>                 pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>                 pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
> -               pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
> -               pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
>                 irq_set_handler_locked(d, handle_level_irq);
>                 break;
>
> @@ -501,8 +496,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>                 pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>                 pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>                 pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
> -               pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
> -               pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
>                 irq_set_handler_locked(d, handle_level_irq);
>                 break;
>
> --
> 2.28.0
>


-- 
With Best Regards,
Andy Shevchenko