Re: [PATCH v1 1/3] pinctrl: tigerlake: Fix register offsets for TGL-H variant

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Tue, Sep 29, 2020 at 3:30 PM Andy Shevchenko
<andy.shevchenko@xxxxxxxxx> wrote:
> On Tue, Sep 29, 2020 at 4:25 PM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
> > On Tue, Sep 29, 2020 at 1:03 PM Andy Shevchenko
> > <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote:
> >
> > > It appears that almost traditionally the H variants have some deviations
> > > in the register offsets in comparison to LP ones. This is the case for
> > > Intel Tiger Lake as well. Fix register offsets for TGL-H variant.
> > >
> > > Fixes: 653d96455e1e ("pinctrl: tigerlake: Add support for Tiger Lake-H")
> > > Reported-by: Pierre-Louis Bossart <pierre-louis.bossart@xxxxxxxxxxxxxxx>
> > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> >
> > I could apply this one for fixes as you indicated in another thread,
> > does the other two patches depend on it?
>
> Logically -- yes, functionally -- no. They may be applied for v5.10
> or, as I said, v5.11 (but in the latter case I will do it the usual
> way, via our branch).

OK since they are all ACKed I just applied all three for v5.10.

Thanks!
Linus Walleij