RE: [PATCH 21/22] arm64: dts: imx8qxp: Remove i.MX7 compatible from USDHC

[Bough Chen <haibo.chen@xxxxxxx>]

> -----Original Message-----
> From: Dong Aisheng [mailto:dongas86@xxxxxxxxx]
> Sent: 2020年8月24日 17:45
> To: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Cc: Aisheng Dong <aisheng.dong@xxxxxxx>; devicetree@xxxxxxxxxxxxxxx;
> linux-serial@xxxxxxxxxxxxxxx; Anson Huang <anson.huang@xxxxxxx>;
> linux-gpio@xxxxxxxxxxxxxxx; Fabio Estevam <festevam@xxxxxxxxx>; Linus
> Walleij <linus.walleij@xxxxxxxxxx>; linux-pm@xxxxxxxxxxxxxxx;
> linux-mmc@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> linux-pwm@xxxxxxxxxxxxxxx; Bartosz Golaszewski
> <bgolaszewski@xxxxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>;
> linux-mtd@xxxxxxxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx>; Pengutronix
> Kernel Team <kernel@xxxxxxxxxxxxxx>; Thierry Reding
> <thierry.reding@xxxxxxxxx>; Shawn Guo <shawnguo@xxxxxxxxxx>; Sascha
> Hauer <s.hauer@xxxxxxxxxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> linux-watchdog@xxxxxxxxxxxxxxx; Bough Chen <haibo.chen@xxxxxxx>
> Subject: Re: [PATCH 21/22] arm64: dts: imx8qxp: Remove i.MX7 compatible
> from USDHC
> 
> On Mon, Aug 24, 2020 at 5:15 PM Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> wrote:
> >
> > On Mon, Aug 24, 2020 at 09:00:19AM +0000, Aisheng Dong wrote:
> > > > From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> > > > Sent: Monday, August 24, 2020 12:16 AM
> > > >
> > > > The USDHC on i.MX 8QXP has its own compatible described in
> > > > bindings and used in the driver (with its own quirks).  Remove
> > > > additional fsl,imx7d-usdhc compatible to fix dtbs_check warnings like:
> > > >
> > > >   arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml:
> mmc@5b010000:
> > > >     compatible: ['fsl,imx8qxp-usdhc', 'fsl,imx7d-usdhc'] is too long
> > > >     From schema:
> > > > /ocumentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > > >
> > > >   arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dt.yaml:
> mmc@5b010000:
> > > >     compatible: Additional items are not allowed
> > > > ('fsl,imx7d-usdhc' was
> > > > unexpected)
> > > >
> > > > Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> > >
> > > For Patch 19-22, I think we should fix dt binding doc.
> >
> > Are you sure that these USDHC controllers are compatible with i.MX 7D?
> > Could they really run with fsl,imx7d-usdhc compatible?
> 
> AFAIK uSDHC on QXP is derived from the former platforms with adding a few
> more new features. e.g. HS400ES/CMDQ.
> Let me loop in uSDHC driver owner Haibo Chen to double confirm.

Yes, usdhc of imx8qxp can work by using the compatible "fsl, imx7d-usdhc", but will not support HS400ES/Command Queue any more. Also imx8qxp support Auto CMD23, but imx7d not.
And imx8qxp need to re-config the clock rate after system PM, imx7d do not need to do this.


> 
> Regards
> Aisheng
> 
> > The implementation (Linux kernel driver) is different, I guess on
> > purpose...
> >
> > Best regards,
> > Krzysztof
> >
> > >
> > > Regards
> > > Aisheng
> > >
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 6 +++---
> > > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > > index 61bccb69f09e..26c4fcdfe290 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > > @@ -362,7 +362,7 @@
> > > >             };
> > > >
> > > >             usdhc1: mmc@5b010000 {
> > > > -                   compatible = "fsl,imx8qxp-usdhc",
> "fsl,imx7d-usdhc";
> > > > +                   compatible = "fsl,imx8qxp-usdhc";
> > > >                     interrupts = <GIC_SPI 232
> IRQ_TYPE_LEVEL_HIGH>;
> > > >                     reg = <0x5b010000 0x10000>;
> > > >                     clocks = <&conn_lpcg
> > > > IMX_CONN_LPCG_SDHC0_IPG_CLK>, @@
> > > > -374,7 +374,7 @@
> > > >             };
> > > >
> > > >             usdhc2: mmc@5b020000 {
> > > > -                   compatible = "fsl,imx8qxp-usdhc",
> "fsl,imx7d-usdhc";
> > > > +                   compatible = "fsl,imx8qxp-usdhc";
> > > >                     interrupts = <GIC_SPI 233
> IRQ_TYPE_LEVEL_HIGH>;
> > > >                     reg = <0x5b020000 0x10000>;
> > > >                     clocks = <&conn_lpcg
> > > > IMX_CONN_LPCG_SDHC1_IPG_CLK>, @@
> > > > -388,7 +388,7 @@
> > > >             };
> > > >
> > > >             usdhc3: mmc@5b030000 {
> > > > -                   compatible = "fsl,imx8qxp-usdhc",
> "fsl,imx7d-usdhc";
> > > > +                   compatible = "fsl,imx8qxp-usdhc";
> > > >                     interrupts = <GIC_SPI 234
> IRQ_TYPE_LEVEL_HIGH>;
> > > >                     reg = <0x5b030000 0x10000>;
> > > >                     clocks = <&conn_lpcg
> > > > IMX_CONN_LPCG_SDHC2_IPG_CLK>,
> > > > --
> > > > 2.17.1
> > >
> >
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