On Mon, Aug 17, 2020 at 10:46:30AM +0900, Nobuhiro Iwamatsu wrote: > Add basic support for the Visconti TMPV7708 SoC peripherals - > - CPU > - CA53 x 4 and 2 cluster. > - not support PSCI, currently only spin-table is supported. Do you have plans to support PSCI in future ? It is now almost more than 5 year old specification. So they should be strong reason for not supporting that. [..] > diff --git a/arch/arm64/boot/dts/toshiba/Makefile b/arch/arm64/boot/dts/toshiba/Makefile > new file mode 100644 > index 000000000000..8cd460d5b68e > --- /dev/null > +++ b/arch/arm64/boot/dts/toshiba/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb > diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > new file mode 100644 > index 000000000000..a883d3ab1858 > --- /dev/null > +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts > @@ -0,0 +1,44 @@ [..] > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + always-on; Will this be true when CPU is in low power modes ? -- Regards, Sudeep