On 2020-07-06 18:53, Michael Walle wrote:
Add support for the interrupt controller inside the sl28 CPLD
management
controller.
The interrupt controller can handle at most 8 interrupts and is really
simplistic and consists only of an interrupt mask and an interrupt
pending register.
Signed-off-by: Michael Walle <michael@xxxxxxxx>
---
Changes since v4:
- update copyright year
- don't use "int irq" instead of "unsigne int irq", because
platform_get_irq() might return a negative error code. Found by
"kernel
test robot <lkp@xxxxxxxxx>
- remove comma in terminator line of the compatible strings list,
suggested by Andy
- use newer devm_regmap_add_irq_chip_fwnode()
- don't use KBUID_MODNAME, suggested by Andy
- remove the platform device table
Changes since v3:
- see cover letter
drivers/irqchip/Kconfig | 8 +++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-sl28cpld.c | 96 ++++++++++++++++++++++++++++++++++
3 files changed, 105 insertions(+)
create mode 100644 drivers/irqchip/irq-sl28cpld.c
Acked-by: Marc Zyngier <maz@xxxxxxxxxx>
Given the dependency on the MFD patches, I assume this will
be routed to that subsystem. Please let me know if you want
it to be handled differently.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
