On Thu, Jun 18, 2020 at 4:59 AM Hyeonki Hong <hhk7734@xxxxxxxxx> wrote: > If a GPIO bank has greater than 16 pins, PAD_DS_REG is split into two > or more registers. However, when register and bit were calculated, the > first register defined in the bank was used, and the bit was calculated > based on the first pin. This causes problems in setting the driving > strength. > > The following method was used to solve this problem: > A bit is calculated first using predefined strides. Then, If the bit is > 32 or more, the register is changed by the quotient of the bit divided > by 32. And the bit is set to the remainder. > > Signed-off-by: Hyeonki Hong <hhk7734@xxxxxxxxx> Patch applied. Yours, Linus Walleij