On Tue, Jun 18, 2019 at 12:46:24AM -0700, Sowjanya Komatineni wrote: > This patch creates APIs for supporting Tegra210 clock driver to > perform DFLL suspend and resume operation. > > During suspend, DFLL mode is saved and on resume Tegra210 clock driver > invokes DFLL resume API to re-initialize DFLL to enable target device > clock in open loop mode or closed loop mode. > > Signed-off-by: Sowjanya Komatineni <skomatineni@xxxxxxxxxx> > --- > drivers/clk/tegra/clk-dfll.c | 78 ++++++++++++++++++++++++++++++++++++++++++++ > drivers/clk/tegra/clk-dfll.h | 2 ++ > 2 files changed, 80 insertions(+) Acked-by: Thierry Reding <treding@xxxxxxxxxx>
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