Re: [PATCH 00/11] pinctrl: sh-pfc: Convert to new non-GPIO helper macros

[Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>]

On Mon, May 13, 2019 at 5:29 PM Geert Uytterhoeven
<geert+renesas@xxxxxxxxx> wrote:
> On many Renesas ARM SoCs, there exist pins that are not associated with
> a GPIO port, but still need configuration (e.g. drive strength or
> pull-up).  While pins with GPIO functionality are indexed by their
> GPIO number, no such number exists for non-GPIO pins.  Hence for the
> latter, the pin control driver uses numbers outside the GPIO number
> space, derived from the row and column numbers of the physical pins.
>
> For R-Car H3 (and later M3-W and M3-N), the choice was made to use the
> SiP (System-in-Package, i.e. SoC + RAM + HyperFlash in a BGA package)
> physical pin numbers, as the SiP was what was mounted on the
> Salvator-X(S) and ULCB development boards available at that time.
>
> In hindsight, it would have been better to settle on the SoC physical
> pin numbers, though: the pin control driver for R-Car M3-W was reused
> for the RZ/G2M SoC, which is only available as an SoC, not SiP, thus
> making it hard to match the driver with the documentation.
>
> But even for SoCs there can be confusion: several SoCs are available in
> multiple packages, with the same or different number of pins, leading to
> different pin numberings.
>
> As this numbering is used only internal to the driver, and pin control
> configuration from DT refers to these pins by signal name, not pin
> number (usually, see exceptions below[*]), I started wondering if we
> could get rid of the SoC/SiP pin numbers instead.  As the actual numbers
> don't matter, all that is needed for the driver is a unique number for
> each pin.
>
> Hence this patch series converts the affected drivers to use new macros
> that allow to describe pins without GPIO functionality, and refer to
> them by auto-generated symbolic enum values, similar in spirit to the
> existing scheme for handling pins with GPIO functionality.
>
> This series consists of three parts:
>   - Patch 1 introduces new macros to describe and handle pins without
>     GPIO functionality,
>   - Patches 2-10 convert the pin control drivers for the individual SoCs
>     to use the new macros,
>   - Patch 11 removes the now unused old macros.

Due to popular demand, I've pushed this (and its dependencies) to
branch topic/sh-pfc-nogp-v1 of
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds