tree: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git gpio-descriptors-spi head: 9801989c69da04d1ebd5da6afdf9f47694f4eae9 commit: 26485bc24cf021c35bc59d67f8944c532b9bd0b1 [1/13] gpio: Pass a flag to gpiochip_request_own_desc() config: arm-allmodconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 26485bc24cf021c35bc59d67f8944c532b9bd0b1 # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=arm All errors (new ones prefixed by >>): drivers/memory/omap-gpmc.c: In function 'gpmc_probe_generic_child': >> drivers/memory/omap-gpmc.c:2174:9: error: type of formal parameter 4 is incomplete 0); ^ vim +2174 drivers/memory/omap-gpmc.c 2023 2024 /** 2025 * gpmc_probe_generic_child - configures the gpmc for a child device 2026 * @pdev: pointer to gpmc platform device 2027 * @child: pointer to device-tree node for child device 2028 * 2029 * Allocates and configures a GPMC chip-select for a child device. 2030 * Returns 0 on success and appropriate negative error code on failure. 2031 */ 2032 static int gpmc_probe_generic_child(struct platform_device *pdev, 2033 struct device_node *child) 2034 { 2035 struct gpmc_settings gpmc_s; 2036 struct gpmc_timings gpmc_t; 2037 struct resource res; 2038 unsigned long base; 2039 const char *name; 2040 int ret, cs; 2041 u32 val; 2042 struct gpio_desc *waitpin_desc = NULL; 2043 struct gpmc_device *gpmc = platform_get_drvdata(pdev); 2044 2045 if (of_property_read_u32(child, "reg", &cs) < 0) { 2046 dev_err(&pdev->dev, "%pOF has no 'reg' property\n", 2047 child); 2048 return -ENODEV; 2049 } 2050 2051 if (of_address_to_resource(child, 0, &res) < 0) { 2052 dev_err(&pdev->dev, "%pOF has malformed 'reg' property\n", 2053 child); 2054 return -ENODEV; 2055 } 2056 2057 /* 2058 * Check if we have multiple instances of the same device 2059 * on a single chip select. If so, use the already initialized 2060 * timings. 2061 */ 2062 name = gpmc_cs_get_name(cs); 2063 if (name && of_node_cmp(child->name, name) == 0) 2064 goto no_timings; 2065 2066 ret = gpmc_cs_request(cs, resource_size(&res), &base); 2067 if (ret < 0) { 2068 dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); 2069 return ret; 2070 } 2071 gpmc_cs_set_name(cs, child->name); 2072 2073 gpmc_read_settings_dt(child, &gpmc_s); 2074 gpmc_read_timings_dt(child, &gpmc_t); 2075 2076 /* 2077 * For some GPMC devices we still need to rely on the bootloader 2078 * timings because the devices can be connected via FPGA. 2079 * REVISIT: Add timing support from slls644g.pdf. 2080 */ 2081 if (!gpmc_t.cs_rd_off) { 2082 WARN(1, "enable GPMC debug to configure .dts timings for CS%i\n", 2083 cs); 2084 gpmc_cs_show_timings(cs, 2085 "please add GPMC bootloader timings to .dts"); 2086 goto no_timings; 2087 } 2088 2089 /* CS must be disabled while making changes to gpmc configuration */ 2090 gpmc_cs_disable_mem(cs); 2091 2092 /* 2093 * FIXME: gpmc_cs_request() will map the CS to an arbitary 2094 * location in the gpmc address space. When booting with 2095 * device-tree we want the NOR flash to be mapped to the 2096 * location specified in the device-tree blob. So remap the 2097 * CS to this location. Once DT migration is complete should 2098 * just make gpmc_cs_request() map a specific address. 2099 */ 2100 ret = gpmc_cs_remap(cs, res.start); 2101 if (ret < 0) { 2102 dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", 2103 cs, &res.start); 2104 if (res.start < GPMC_MEM_START) { 2105 dev_info(&pdev->dev, 2106 "GPMC CS %d start cannot be lesser than 0x%x\n", 2107 cs, GPMC_MEM_START); 2108 } else if (res.end > GPMC_MEM_END) { 2109 dev_info(&pdev->dev, 2110 "GPMC CS %d end cannot be greater than 0x%x\n", 2111 cs, GPMC_MEM_END); 2112 } 2113 goto err; 2114 } 2115 2116 if (of_node_cmp(child->name, "nand") == 0) { 2117 /* Warn about older DT blobs with no compatible property */ 2118 if (!of_property_read_bool(child, "compatible")) { 2119 dev_warn(&pdev->dev, 2120 "Incompatible NAND node: missing compatible"); 2121 ret = -EINVAL; 2122 goto err; 2123 } 2124 } 2125 2126 if (of_node_cmp(child->name, "onenand") == 0) { 2127 /* Warn about older DT blobs with no compatible property */ 2128 if (!of_property_read_bool(child, "compatible")) { 2129 dev_warn(&pdev->dev, 2130 "Incompatible OneNAND node: missing compatible"); 2131 ret = -EINVAL; 2132 goto err; 2133 } 2134 } 2135 2136 if (of_device_is_compatible(child, "ti,omap2-nand")) { 2137 /* NAND specific setup */ 2138 val = 8; 2139 of_property_read_u32(child, "nand-bus-width", &val); 2140 switch (val) { 2141 case 8: 2142 gpmc_s.device_width = GPMC_DEVWIDTH_8BIT; 2143 break; 2144 case 16: 2145 gpmc_s.device_width = GPMC_DEVWIDTH_16BIT; 2146 break; 2147 default: 2148 dev_err(&pdev->dev, "%s: invalid 'nand-bus-width'\n", 2149 child->name); 2150 ret = -EINVAL; 2151 goto err; 2152 } 2153 2154 /* disable write protect */ 2155 gpmc_configure(GPMC_CONFIG_WP, 0); 2156 gpmc_s.device_nand = true; 2157 } else { 2158 ret = of_property_read_u32(child, "bank-width", 2159 &gpmc_s.device_width); 2160 if (ret < 0 && !gpmc_s.device_width) { 2161 dev_err(&pdev->dev, 2162 "%pOF has no 'gpmc,device-width' property\n", 2163 child); 2164 goto err; 2165 } 2166 } 2167 2168 /* Reserve wait pin if it is required and valid */ 2169 if (gpmc_s.wait_on_read || gpmc_s.wait_on_write) { 2170 unsigned int wait_pin = gpmc_s.wait_pin; 2171 2172 waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, 2173 wait_pin, "WAITPIN", > 2174 0); 2175 if (IS_ERR(waitpin_desc)) { 2176 dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); 2177 ret = PTR_ERR(waitpin_desc); 2178 goto err; 2179 } 2180 } 2181 2182 gpmc_cs_show_timings(cs, "before gpmc_cs_program_settings"); 2183 2184 ret = gpmc_cs_program_settings(cs, &gpmc_s); 2185 if (ret < 0) 2186 goto err_cs; 2187 2188 ret = gpmc_cs_set_timings(cs, &gpmc_t, &gpmc_s); 2189 if (ret) { 2190 dev_err(&pdev->dev, "failed to set gpmc timings for: %s\n", 2191 child->name); 2192 goto err_cs; 2193 } 2194 2195 /* Clear limited address i.e. enable A26-A11 */ 2196 val = gpmc_read_reg(GPMC_CONFIG); 2197 val &= ~GPMC_CONFIG_LIMITEDADDRESS; 2198 gpmc_write_reg(GPMC_CONFIG, val); 2199 2200 /* Enable CS region */ 2201 gpmc_cs_enable_mem(cs); 2202 2203 no_timings: 2204 2205 /* create platform device, NULL on error or when disabled */ 2206 if (!of_platform_device_create(child, NULL, &pdev->dev)) 2207 goto err_child_fail; 2208 2209 /* is child a common bus? */ 2210 if (of_match_node(of_default_bus_match_table, child)) 2211 /* create children and other common bus children */ 2212 if (of_platform_default_populate(child, NULL, &pdev->dev)) 2213 goto err_child_fail; 2214 2215 return 0; 2216 2217 err_child_fail: 2218 2219 dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); 2220 ret = -ENODEV; 2221 2222 err_cs: 2223 gpiochip_free_own_desc(waitpin_desc); 2224 err: 2225 gpmc_cs_free(cs); 2226 2227 return ret; 2228 } 2229 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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