Add description of the GPI / GPO block in the Altera SoCFPGA FPGA manager. The GPIO block in the FPGA manager has two 32bit registers, one for setting 32 GPOs and another one for reading 32 GPIs, both of which can be mapped to separate physical pads. Signed-off-by: Marek Vasut <marex@xxxxxxx> --- drivers/gpio/gpio-syscon.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 7f3da34c7874..b90ee759d150 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -193,6 +193,13 @@ static const struct syscon_gpio_data keystone_dsp_gpio = { .set = keystone_gpio_set, }; +static const struct syscon_gpio_data altera_fpga_mgr_gpio = { + /* ARM Altera SoCFPGA FPGA manager GPIO block */ + .compatible = NULL, + .flags = GPIO_SYSCON_FEAT_IN | GPIO_SYSCON_FEAT_OUT, + .bit_count = 64, +}; + static const struct of_device_id syscon_gpio_ids[] = { { .compatible = "cirrus,ep7209-mctrl-gpio", @@ -206,6 +213,10 @@ static const struct of_device_id syscon_gpio_ids[] = { .compatible = "rockchip,rk3328-grf-gpio", .data = &rockchip_rk3328_gpio_mute, }, + { + .compatible = "altr,fpga-mgr-gpio", + .data = &altera_fpga_mgr_gpio, + }, { } }; MODULE_DEVICE_TABLE(of, syscon_gpio_ids); -- 2.18.0