On Mon, Sep 24, 2018 at 4:33 PM Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> wrote: > It turns out the HOSTSW_OWN register offset is different between LP and > H variants. The latter should use 0xc0 instead so fix that. > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=199911 > Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") > Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> Patch applied for fixes with Andy's ACK. Yours, Linus Walleij
Re: [PATCH 1/2] pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant
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- Subject: Re: [PATCH 1/2] pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant
- From: Linus Walleij <linus.walleij@xxxxxxxxxx>
- Date: Tue, 25 Sep 2018 12:48:56 +0200
- In-reply-to: <20180924143212.81251-1-mika.westerberg@linux.intel.com>
- References: <20180924143212.81251-1-mika.westerberg@linux.intel.com>
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- [PATCH 1/2] pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant
- From: Mika Westerberg
- [PATCH 1/2] pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant
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