Re: [PATCH 2/4] spi: gpio: Fix reading for 3WIRE

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Tue, Sep 4, 2018 at 7:40 PM Mark Brown <broonie@xxxxxxxxxx> wrote:
> On Mon, Sep 03, 2018 at 11:50:33PM +0200, Linus Walleij wrote:
> > If he GPIO bitbanged host is registered using just one line,
> > MISO, naturally the DT parser will flag the host as
> > SPI_MASTER_NO_RX.
> >
> > This makes the GPIO SPI driver assign word transfer functions
> > that enforce the SPI master flags SPI_MASTER_NO_RX (or
> > SPI_MASTER_NO_TX) to the flags on each call down to the
> > inlined bitbang functions such as bitbang_txrx_be_cpha0().
>
> No, this is at completely the wrong abstraction level and is not going
> to help with maintainability at all.  If devices that can recieve data
> are being marked as not having that capability that's obviously not
> desirable and is the thing that should be fixed, trying to contort
> around it in individual drivers is just going to lead to fragility later
> on if someone writes other code looks at the flag and trusts it to be
> accurate.  We should instead fix the code that sets the flags to take
> account of three wire support.

It's a bit convoluted... :/

The basic brokenness with the current 3WIRE support is that is
doesn't work with just 3 wires, you have to have both MOSI
and MISO for the code to work (as explained by Lorenzo in
another message, his testbed has 4 wires so he didn't see it).

So the code can't even do what it is
named after. At least no bitbang driver can, because the
spi-bitbang-txrx.h have clauses like this:

if ((flags & SPI_MASTER_NO_TX) == 0)
(...)
if ((flags & SPI_MASTER_NO_RX) == 0)
(...)

Where it actively avoids writing or sampling the line unless there
is TX/RX lines (MOSI/MISO).

I will try to provide a proper fix.

Yours,
Linus Walleij