On Tue 2018-06-05 18:37:21, Andy Shevchenko wrote: > On Wed, May 23, 2018 at 5:06 PM, Pavel Machek <pavel@xxxxxx> wrote: > > On Thu 2018-05-17 06:59:49, H. Nikolaus Schaller wrote: > >> The register constants are so far defined in a way that they fit > >> for the pcal9555a when shifted by the number of banks, i.e. are > >> multiplied by 2 in the accessor function. > >> > >> Now, the pcal6524 has 3 banks which means the relative offset > >> is multiplied by 4 for the standard registers. > >> > >> Simply applying the bit shift to the extended registers gives > >> a wrong result, since the base offset is already included in > >> the offset. > >> > >> Therefore, we have to add code to the 24 bit accessor functions > >> that adjusts the register number for these exended registers. > >> > >> The formula finally used was developed and proposed by > >> Andy Shevchenko <andy.shevchenko@xxxxxxxxx>. > > >> int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); > >> + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; > >> + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; > > > Is this reasonable to do on each register access? Compiler will not be > > able to optimize out fls and shifts, right? > > On modern CPUs fls() is one assembly command. OTOH, any proposal to do > this better? > > What I can see is that bank_shift is invariant to the function, and > maybe cached. Yes, I thought that caching bank_shift might be good idea. I thought it was constant for given chip... Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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