Re: [PATCH 2/2] gpio: aspeed: Use a cache of output data registers

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Thu, May 17, 2018 at 10:12 AM, Benjamin Herrenschmidt
<benh@xxxxxxxxxxx> wrote:

> The current driver does a read/modify/write of the output
> registers when changing a bit in __aspeed_gpio_set().
>
> This is sub-optimal for a couple of reasons:
>
>   - If any of the neighbouring GPIOs (sharing the shared
> register) isn't (yet) configured as an output, it will
> read the current input value, and then apply it to the
> output latch, which may not be what the user expects. There
> should be no bug in practice as aspeed_gpio_dir_out() will
> establish a new value but it's not great either.
>
>   - The GPIO block in the aspeed chip is clocked rather
> slowly (typically 25Mhz). That extra MMIO read halves the maximum
> speed at which we can toggle the GPIO.
>
> This provides a significant performance improvement to the GPIO
> based FSI master.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
> Reviewed-by: Christopher Bostic <cbostic@xxxxxxxxxxxxxxxxxx>
> Reviewed-by: Andrew Jeffery <andrew@xxxxxxxx>

Patch applied with Joel's test tag!

Yours,
Linus Walleij
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