On Fri, May 04, 2018 at 01:55:37AM +0300, Dmitry Osipenko wrote:
> Commit 4c9a27a6c66d ("ARM: tegra: Fix ULPI regression on Tegra20") changed
> "ulpi-link" clock from CDEV2 to PLL_P_OUT4. Turned out that PLL_P_OUT4 is
> the parent of CDEV2 clock and original clock setup of "ulpi-link" was
> correct. The reverted patch was fixing USB for one board and broke the
> other, now Tegra's clk driver correctly sets parent for the CDEV2 clock
> and hence patch could be reverted safely, restoring USB for all of the
> boards.
>
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> Reviewed-by: Marcel Ziswiler <marcel@xxxxxxxxxxxx>
> Tested-by: Marcel Ziswiler <marcel@xxxxxxxxxxxx>
> Tested-by: Marc Dietrich <marvin24@xxxxxx>
> ---
> arch/arm/boot/dts/tegra20.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Is it still true that this patch alone fixes the known regression? I'm
just asking because the remainder of the series, even though it sounds
to be the right thing to do, is fairly big for a fix against v4.17.
So if this alone fixes the regression I think it'd be best to queue it
up for v4.17 and get the rest of the patches into v4.18.
Thierry
Attachment:
signature.asc
Description: PGP signature
