Re: [PATCH 4/6] pinctrl: fsl: add scu based pinctrl support

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On Wed, May 02, 2018 at 03:03:04PM +0200, Linus Walleij wrote:
> On Wed, May 2, 2018 at 2:36 PM, Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote:
> > Hi Linus,
> >
> > On Wed, May 02, 2018 at 02:29:04PM +0200, Linus Walleij wrote:
> >> On Wed, May 2, 2018 at 2:27 PM, Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
> >> > On Fri, Apr 27, 2018 at 9:01 PM, Dong Aisheng <aisheng.dong@xxxxxxx> wrote:
> >> >
> >> >> Some i.MX SoCs (e.g. MX8QXP and MX8QM) contain a system controller
> >> >> that is responsible for controlling the pad setting of the IPs that
> >> >> are present. Communication between the host processor running an OS
> >> >> and the system controller happens through a SCU protocol.
> >> >> This patch adds SCU protocol based pinctrl drivers.
> >> >>
> >> >> Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>
> >> >> Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
> >> >> Cc: Fabio Estevam <festevam@xxxxxxxxx>
> >> >> Cc: Stefan Agner <stefan@xxxxxxxx>
> >> >> Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
> >> >> Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx>
> >> >
> >> > Patch applied.
> >>
> >> Bah on second thought holding this back since I see thyere are
> >> some discussions about the bindings in the next patch.
> >
> > Also note that this patch depends on the SCU base support posted elsewhere
> > as Dong mentioned in his introductory mail.
> 
> Aha is that a compile-time dependence?

Yes.

> 
> I guess it would be better if it is one big series if it is supposed
> to be merged in one big series.

The SCU is a coprocessor that provides pinctrl, clk, power domain and
other misc stuff, so posting this as multiple series should be the way
to go.

Sascha

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