tree: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel head: 7d2c7db6e4a7c06fdb33ccc9c54ee125bb630546 commit: d219b924611a5cceb17cc6b9a8dd103ab9668c94 [19/27] pinctrl: change Kconfig PINCTRL variable to a menuconfig config: m32r-allmodconfig (attached as .config) compiler: m32r-linux-gcc (GCC) 6.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout d219b924611a5cceb17cc6b9a8dd103ab9668c94 # save the attached .config to linux build tree make.cross ARCH=m32r All warnings (new ones prefixed by >>): In file included from arch/m32r/include/uapi/asm/byteorder.h:7:0, from arch/m32r/include/asm/bitops.h:21, from include/linux/bitops.h:37, from include/linux/kernel.h:10, from include/linux/clk.h:16, from drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:15: include/linux/byteorder/big_endian.h:7:2: warning: #warning inconsistent configuration, needs CONFIG_CPU_BIG_ENDIAN [-Wcpp] #warning inconsistent configuration, needs CONFIG_CPU_BIG_ENDIAN ^~~~~~~ In file included from include/linux/printk.h:329:0, from include/linux/kernel.h:13, from include/linux/clk.h:16, from drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:15: drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c: In function 'configure_memdma_and_inputblock': >> drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:590:20: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'long unsigned int' [-Wformat=] dev_dbg(fei->dev, "chan=%d PIDF_BASE=0x%x pid_bus_addr=%pad\n", ^ include/linux/dynamic_debug.h:134:39: note: in definition of macro 'dynamic_dev_dbg' __dynamic_dev_dbg(&descriptor, dev, fmt, \ ^~~ >> drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:590:2: note: in expansion of macro 'dev_dbg' dev_dbg(fei->dev, "chan=%d PIDF_BASE=0x%x pid_bus_addr=%pad\n", ^~~~~~~ >> drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:20: warning: format '%d' expects argument of type 'int', but argument 5 has type 'long unsigned int' [-Wformat=] dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^ include/linux/dynamic_debug.h:134:39: note: in definition of macro 'dynamic_dev_dbg' __dynamic_dev_dbg(&descriptor, dev, fmt, \ ^~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:2: note: in expansion of macro 'dev_dbg' dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^~~~~~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:20: warning: format '%d' expects argument of type 'int', but argument 6 has type 'long unsigned int' [-Wformat=] dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^ include/linux/dynamic_debug.h:134:39: note: in definition of macro 'dynamic_dev_dbg' __dynamic_dev_dbg(&descriptor, dev, fmt, \ ^~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:2: note: in expansion of macro 'dev_dbg' dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^~~~~~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:20: warning: format '%d' expects argument of type 'int', but argument 7 has type 'long unsigned int' [-Wformat=] dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^ include/linux/dynamic_debug.h:134:39: note: in definition of macro 'dynamic_dev_dbg' __dynamic_dev_dbg(&descriptor, dev, fmt, \ ^~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:2: note: in expansion of macro 'dev_dbg' dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^~~~~~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:20: warning: format '%d' expects argument of type 'int', but argument 8 has type 'long unsigned int' [-Wformat=] dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^ include/linux/dynamic_debug.h:134:39: note: in definition of macro 'dynamic_dev_dbg' __dynamic_dev_dbg(&descriptor, dev, fmt, \ ^~~ drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c:607:2: note: in expansion of macro 'dev_dbg' dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", ^~~~~~~ vim +590 drivers/media/platform/sti/c8sectpfe/c8sectpfe-core.c c5f5d0f9 Peter Griffin 2015-07-30 448 c5f5d0f9 Peter Griffin 2015-07-30 449 static int configure_memdma_and_inputblock(struct c8sectpfei *fei, c5f5d0f9 Peter Griffin 2015-07-30 450 struct channel_info *tsin) c5f5d0f9 Peter Griffin 2015-07-30 451 { c5f5d0f9 Peter Griffin 2015-07-30 452 int ret; c5f5d0f9 Peter Griffin 2015-07-30 453 u32 tmp; c5f5d0f9 Peter Griffin 2015-07-30 454 char tsin_pin_name[MAX_NAME]; c5f5d0f9 Peter Griffin 2015-07-30 455 c5f5d0f9 Peter Griffin 2015-07-30 456 if (!fei || !tsin) c5f5d0f9 Peter Griffin 2015-07-30 457 return -EINVAL; c5f5d0f9 Peter Griffin 2015-07-30 458 c5f5d0f9 Peter Griffin 2015-07-30 459 dev_dbg(fei->dev, "%s:%d Configuring channel=%p tsin=%d\n" c5f5d0f9 Peter Griffin 2015-07-30 460 , __func__, __LINE__, tsin, tsin->tsin_id); c5f5d0f9 Peter Griffin 2015-07-30 461 c5f5d0f9 Peter Griffin 2015-07-30 462 init_completion(&tsin->idle_completion); c5f5d0f9 Peter Griffin 2015-07-30 463 c5f5d0f9 Peter Griffin 2015-07-30 464 tsin->back_buffer_start = kzalloc(FEI_BUFFER_SIZE + c5f5d0f9 Peter Griffin 2015-07-30 465 FEI_ALIGNMENT, GFP_KERNEL); c5f5d0f9 Peter Griffin 2015-07-30 466 c5f5d0f9 Peter Griffin 2015-07-30 467 if (!tsin->back_buffer_start) { c5f5d0f9 Peter Griffin 2015-07-30 468 ret = -ENOMEM; c5f5d0f9 Peter Griffin 2015-07-30 469 goto err_unmap; c5f5d0f9 Peter Griffin 2015-07-30 470 } c5f5d0f9 Peter Griffin 2015-07-30 471 c5f5d0f9 Peter Griffin 2015-07-30 472 /* Ensure backbuffer is 32byte aligned */ c5f5d0f9 Peter Griffin 2015-07-30 473 tsin->back_buffer_aligned = tsin->back_buffer_start c5f5d0f9 Peter Griffin 2015-07-30 474 + FEI_ALIGNMENT; c5f5d0f9 Peter Griffin 2015-07-30 475 c5f5d0f9 Peter Griffin 2015-07-30 476 tsin->back_buffer_aligned = (void *) c5f5d0f9 Peter Griffin 2015-07-30 477 (((uintptr_t) tsin->back_buffer_aligned) & ~0x1F); c5f5d0f9 Peter Griffin 2015-07-30 478 c5f5d0f9 Peter Griffin 2015-07-30 479 tsin->back_buffer_busaddr = dma_map_single(fei->dev, c5f5d0f9 Peter Griffin 2015-07-30 480 (void *)tsin->back_buffer_aligned, c5f5d0f9 Peter Griffin 2015-07-30 481 FEI_BUFFER_SIZE, c5f5d0f9 Peter Griffin 2015-07-30 482 DMA_BIDIRECTIONAL); c5f5d0f9 Peter Griffin 2015-07-30 483 c5f5d0f9 Peter Griffin 2015-07-30 484 if (dma_mapping_error(fei->dev, tsin->back_buffer_busaddr)) { c5f5d0f9 Peter Griffin 2015-07-30 485 dev_err(fei->dev, "failed to map back_buffer\n"); c5f5d0f9 Peter Griffin 2015-07-30 486 ret = -EFAULT; c5f5d0f9 Peter Griffin 2015-07-30 487 goto err_unmap; c5f5d0f9 Peter Griffin 2015-07-30 488 } c5f5d0f9 Peter Griffin 2015-07-30 489 c5f5d0f9 Peter Griffin 2015-07-30 490 /* c5f5d0f9 Peter Griffin 2015-07-30 491 * The pid buffer can be configured (in hw) for byte or bit c5f5d0f9 Peter Griffin 2015-07-30 492 * per pid. By powers of deduction we conclude stih407 family c5f5d0f9 Peter Griffin 2015-07-30 493 * is configured (at SoC design stage) for bit per pid. c5f5d0f9 Peter Griffin 2015-07-30 494 */ c5f5d0f9 Peter Griffin 2015-07-30 495 tsin->pid_buffer_start = kzalloc(2048, GFP_KERNEL); c5f5d0f9 Peter Griffin 2015-07-30 496 c5f5d0f9 Peter Griffin 2015-07-30 497 if (!tsin->pid_buffer_start) { c5f5d0f9 Peter Griffin 2015-07-30 498 ret = -ENOMEM; c5f5d0f9 Peter Griffin 2015-07-30 499 goto err_unmap; c5f5d0f9 Peter Griffin 2015-07-30 500 } c5f5d0f9 Peter Griffin 2015-07-30 501 c5f5d0f9 Peter Griffin 2015-07-30 502 /* c5f5d0f9 Peter Griffin 2015-07-30 503 * PID buffer needs to be aligned to size of the pid table c5f5d0f9 Peter Griffin 2015-07-30 504 * which at bit per pid is 1024 bytes (8192 pids / 8). c5f5d0f9 Peter Griffin 2015-07-30 505 * PIDF_BASE register enforces this alignment when writing c5f5d0f9 Peter Griffin 2015-07-30 506 * the register. c5f5d0f9 Peter Griffin 2015-07-30 507 */ c5f5d0f9 Peter Griffin 2015-07-30 508 c5f5d0f9 Peter Griffin 2015-07-30 509 tsin->pid_buffer_aligned = tsin->pid_buffer_start + c5f5d0f9 Peter Griffin 2015-07-30 510 PID_TABLE_SIZE; c5f5d0f9 Peter Griffin 2015-07-30 511 c5f5d0f9 Peter Griffin 2015-07-30 512 tsin->pid_buffer_aligned = (void *) c5f5d0f9 Peter Griffin 2015-07-30 513 (((uintptr_t) tsin->pid_buffer_aligned) & ~0x3ff); c5f5d0f9 Peter Griffin 2015-07-30 514 c5f5d0f9 Peter Griffin 2015-07-30 515 tsin->pid_buffer_busaddr = dma_map_single(fei->dev, c5f5d0f9 Peter Griffin 2015-07-30 516 tsin->pid_buffer_aligned, c5f5d0f9 Peter Griffin 2015-07-30 517 PID_TABLE_SIZE, c5f5d0f9 Peter Griffin 2015-07-30 518 DMA_BIDIRECTIONAL); c5f5d0f9 Peter Griffin 2015-07-30 519 c5f5d0f9 Peter Griffin 2015-07-30 520 if (dma_mapping_error(fei->dev, tsin->pid_buffer_busaddr)) { c5f5d0f9 Peter Griffin 2015-07-30 521 dev_err(fei->dev, "failed to map pid_bitmap\n"); c5f5d0f9 Peter Griffin 2015-07-30 522 ret = -EFAULT; c5f5d0f9 Peter Griffin 2015-07-30 523 goto err_unmap; c5f5d0f9 Peter Griffin 2015-07-30 524 } c5f5d0f9 Peter Griffin 2015-07-30 525 c5f5d0f9 Peter Griffin 2015-07-30 526 /* manage cache so pid bitmap is visible to HW */ c5f5d0f9 Peter Griffin 2015-07-30 527 dma_sync_single_for_device(fei->dev, c5f5d0f9 Peter Griffin 2015-07-30 528 tsin->pid_buffer_busaddr, c5f5d0f9 Peter Griffin 2015-07-30 529 PID_TABLE_SIZE, c5f5d0f9 Peter Griffin 2015-07-30 530 DMA_TO_DEVICE); c5f5d0f9 Peter Griffin 2015-07-30 531 c5f5d0f9 Peter Griffin 2015-07-30 532 snprintf(tsin_pin_name, MAX_NAME, "tsin%d-%s", tsin->tsin_id, c5f5d0f9 Peter Griffin 2015-07-30 533 (tsin->serial_not_parallel ? "serial" : "parallel")); c5f5d0f9 Peter Griffin 2015-07-30 534 c5f5d0f9 Peter Griffin 2015-07-30 535 tsin->pstate = pinctrl_lookup_state(fei->pinctrl, tsin_pin_name); c5f5d0f9 Peter Griffin 2015-07-30 536 if (IS_ERR(tsin->pstate)) { c5f5d0f9 Peter Griffin 2015-07-30 537 dev_err(fei->dev, "%s: pinctrl_lookup_state couldn't find %s state\n" c5f5d0f9 Peter Griffin 2015-07-30 538 , __func__, tsin_pin_name); c5f5d0f9 Peter Griffin 2015-07-30 539 ret = PTR_ERR(tsin->pstate); c5f5d0f9 Peter Griffin 2015-07-30 540 goto err_unmap; c5f5d0f9 Peter Griffin 2015-07-30 541 } c5f5d0f9 Peter Griffin 2015-07-30 542 c5f5d0f9 Peter Griffin 2015-07-30 543 ret = pinctrl_select_state(fei->pinctrl, tsin->pstate); c5f5d0f9 Peter Griffin 2015-07-30 544 c5f5d0f9 Peter Griffin 2015-07-30 545 if (ret) { c5f5d0f9 Peter Griffin 2015-07-30 546 dev_err(fei->dev, "%s: pinctrl_select_state failed\n" c5f5d0f9 Peter Griffin 2015-07-30 547 , __func__); c5f5d0f9 Peter Griffin 2015-07-30 548 goto err_unmap; c5f5d0f9 Peter Griffin 2015-07-30 549 } c5f5d0f9 Peter Griffin 2015-07-30 550 c5f5d0f9 Peter Griffin 2015-07-30 551 /* Enable this input block */ c5f5d0f9 Peter Griffin 2015-07-30 552 tmp = readl(fei->io + SYS_INPUT_CLKEN); c5f5d0f9 Peter Griffin 2015-07-30 553 tmp |= BIT(tsin->tsin_id); c5f5d0f9 Peter Griffin 2015-07-30 554 writel(tmp, fei->io + SYS_INPUT_CLKEN); c5f5d0f9 Peter Griffin 2015-07-30 555 c5f5d0f9 Peter Griffin 2015-07-30 556 if (tsin->serial_not_parallel) c5f5d0f9 Peter Griffin 2015-07-30 557 tmp |= C8SECTPFE_SERIAL_NOT_PARALLEL; c5f5d0f9 Peter Griffin 2015-07-30 558 c5f5d0f9 Peter Griffin 2015-07-30 559 if (tsin->invert_ts_clk) c5f5d0f9 Peter Griffin 2015-07-30 560 tmp |= C8SECTPFE_INVERT_TSCLK; c5f5d0f9 Peter Griffin 2015-07-30 561 c5f5d0f9 Peter Griffin 2015-07-30 562 if (tsin->async_not_sync) c5f5d0f9 Peter Griffin 2015-07-30 563 tmp |= C8SECTPFE_ASYNC_NOT_SYNC; c5f5d0f9 Peter Griffin 2015-07-30 564 c5f5d0f9 Peter Griffin 2015-07-30 565 tmp |= C8SECTPFE_ALIGN_BYTE_SOP | C8SECTPFE_BYTE_ENDIANNESS_MSB; c5f5d0f9 Peter Griffin 2015-07-30 566 c5f5d0f9 Peter Griffin 2015-07-30 567 writel(tmp, fei->io + C8SECTPFE_IB_IP_FMT_CFG(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 568 c5f5d0f9 Peter Griffin 2015-07-30 569 writel(C8SECTPFE_SYNC(0x9) | c5f5d0f9 Peter Griffin 2015-07-30 570 C8SECTPFE_DROP(0x9) | c5f5d0f9 Peter Griffin 2015-07-30 571 C8SECTPFE_TOKEN(0x47), c5f5d0f9 Peter Griffin 2015-07-30 572 fei->io + C8SECTPFE_IB_SYNCLCKDRP_CFG(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 573 c5f5d0f9 Peter Griffin 2015-07-30 574 writel(TS_PKT_SIZE, fei->io + C8SECTPFE_IB_PKT_LEN(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 575 c5f5d0f9 Peter Griffin 2015-07-30 576 /* Place the FIFO's at the end of the irec descriptors */ c5f5d0f9 Peter Griffin 2015-07-30 577 c5f5d0f9 Peter Griffin 2015-07-30 578 tsin->fifo = (tsin->tsin_id * FIFO_LEN); c5f5d0f9 Peter Griffin 2015-07-30 579 c5f5d0f9 Peter Griffin 2015-07-30 580 writel(tsin->fifo, fei->io + C8SECTPFE_IB_BUFF_STRT(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 581 writel(tsin->fifo + FIFO_LEN - 1, c5f5d0f9 Peter Griffin 2015-07-30 582 fei->io + C8SECTPFE_IB_BUFF_END(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 583 c5f5d0f9 Peter Griffin 2015-07-30 584 writel(tsin->fifo, fei->io + C8SECTPFE_IB_READ_PNT(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 585 writel(tsin->fifo, fei->io + C8SECTPFE_IB_WRT_PNT(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 586 c5f5d0f9 Peter Griffin 2015-07-30 587 writel(tsin->pid_buffer_busaddr, c5f5d0f9 Peter Griffin 2015-07-30 588 fei->io + PIDF_BASE(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 589 ee105cac Peter Griffin 2016-03-24 @590 dev_dbg(fei->dev, "chan=%d PIDF_BASE=0x%x pid_bus_addr=%pad\n", c5f5d0f9 Peter Griffin 2015-07-30 591 tsin->tsin_id, readl(fei->io + PIDF_BASE(tsin->tsin_id)), 62e5f051 Fabio Estevam 2015-08-18 592 &tsin->pid_buffer_busaddr); c5f5d0f9 Peter Griffin 2015-07-30 593 c5f5d0f9 Peter Griffin 2015-07-30 594 /* Configure and enable HW PID filtering */ c5f5d0f9 Peter Griffin 2015-07-30 595 c5f5d0f9 Peter Griffin 2015-07-30 596 /* c5f5d0f9 Peter Griffin 2015-07-30 597 * The PID value is created by assembling the first 8 bytes of c5f5d0f9 Peter Griffin 2015-07-30 598 * the TS packet into a 64-bit word in big-endian format. A c5f5d0f9 Peter Griffin 2015-07-30 599 * slice of that 64-bit word is taken from c5f5d0f9 Peter Griffin 2015-07-30 600 * (PID_OFFSET+PID_NUM_BITS-1) to PID_OFFSET. c5f5d0f9 Peter Griffin 2015-07-30 601 */ c5f5d0f9 Peter Griffin 2015-07-30 602 tmp = (C8SECTPFE_PID_ENABLE | C8SECTPFE_PID_NUMBITS(13) c5f5d0f9 Peter Griffin 2015-07-30 603 | C8SECTPFE_PID_OFFSET(40)); c5f5d0f9 Peter Griffin 2015-07-30 604 c5f5d0f9 Peter Griffin 2015-07-30 605 writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(tsin->tsin_id)); c5f5d0f9 Peter Griffin 2015-07-30 606 c5f5d0f9 Peter Griffin 2015-07-30 @607 dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", c5f5d0f9 Peter Griffin 2015-07-30 608 tsin->tsin_id, c5f5d0f9 Peter Griffin 2015-07-30 609 readl(fei->io + C8SECTPFE_IB_WRT_PNT(tsin->tsin_id)), c5f5d0f9 Peter Griffin 2015-07-30 610 readl(fei->io + C8SECTPFE_IB_READ_PNT(tsin->tsin_id)), c5f5d0f9 Peter Griffin 2015-07-30 611 readl(fei->io + C8SECTPFE_IB_BUFF_STRT(tsin->tsin_id)), c5f5d0f9 Peter Griffin 2015-07-30 612 readl(fei->io + C8SECTPFE_IB_BUFF_END(tsin->tsin_id))); c5f5d0f9 Peter Griffin 2015-07-30 613 c5f5d0f9 Peter Griffin 2015-07-30 614 /* Get base addpress of pointer record block from DMEM */ c5f5d0f9 Peter Griffin 2015-07-30 615 tsin->irec = fei->io + DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + c5f5d0f9 Peter Griffin 2015-07-30 616 readl(fei->io + DMA_PTRREC_BASE); c5f5d0f9 Peter Griffin 2015-07-30 617 c5f5d0f9 Peter Griffin 2015-07-30 618 /* fill out pointer record data structure */ c5f5d0f9 Peter Griffin 2015-07-30 619 c5f5d0f9 Peter Griffin 2015-07-30 620 /* advance pointer record block to our channel */ c5f5d0f9 Peter Griffin 2015-07-30 621 tsin->irec += (tsin->tsin_id * DMA_PRDS_SIZE); c5f5d0f9 Peter Griffin 2015-07-30 622 c5f5d0f9 Peter Griffin 2015-07-30 623 writel(tsin->fifo, tsin->irec + DMA_PRDS_MEMBASE); c5f5d0f9 Peter Griffin 2015-07-30 624 c5f5d0f9 Peter Griffin 2015-07-30 625 writel(tsin->fifo + FIFO_LEN - 1, tsin->irec + DMA_PRDS_MEMTOP); c5f5d0f9 Peter Griffin 2015-07-30 626 c5f5d0f9 Peter Griffin 2015-07-30 627 writel((188 + 7)&~7, tsin->irec + DMA_PRDS_PKTSIZE); c5f5d0f9 Peter Griffin 2015-07-30 628 c5f5d0f9 Peter Griffin 2015-07-30 629 writel(0x1, tsin->irec + DMA_PRDS_TPENABLE); c5f5d0f9 Peter Griffin 2015-07-30 630 c5f5d0f9 Peter Griffin 2015-07-30 631 /* read/write pointers with physical bus address */ c5f5d0f9 Peter Griffin 2015-07-30 632 c5f5d0f9 Peter Griffin 2015-07-30 633 writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSBASE_TP(0)); c5f5d0f9 Peter Griffin 2015-07-30 634 c5f5d0f9 Peter Griffin 2015-07-30 635 tmp = tsin->back_buffer_busaddr + FEI_BUFFER_SIZE - 1; c5f5d0f9 Peter Griffin 2015-07-30 636 writel(tmp, tsin->irec + DMA_PRDS_BUSTOP_TP(0)); c5f5d0f9 Peter Griffin 2015-07-30 637 c5f5d0f9 Peter Griffin 2015-07-30 638 writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSWP_TP(0)); c5f5d0f9 Peter Griffin 2015-07-30 639 writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSRP_TP(0)); c5f5d0f9 Peter Griffin 2015-07-30 640 c5f5d0f9 Peter Griffin 2015-07-30 641 /* initialize tasklet */ c5f5d0f9 Peter Griffin 2015-07-30 642 tasklet_init(&tsin->tsklet, channel_swdemux_tsklet, c5f5d0f9 Peter Griffin 2015-07-30 643 (unsigned long) tsin); c5f5d0f9 Peter Griffin 2015-07-30 644 c5f5d0f9 Peter Griffin 2015-07-30 645 return 0; c5f5d0f9 Peter Griffin 2015-07-30 646 c5f5d0f9 Peter Griffin 2015-07-30 647 err_unmap: c5f5d0f9 Peter Griffin 2015-07-30 648 free_input_block(fei, tsin); c5f5d0f9 Peter Griffin 2015-07-30 649 return ret; c5f5d0f9 Peter Griffin 2015-07-30 650 } c5f5d0f9 Peter Griffin 2015-07-30 651 :::::: The code at line 590 was first introduced by commit :::::: ee105cac24693c8f3ea92e1700d5d16c4b035eb5 [media] c8sectpfe: Demote print to dev_dbg :::::: TO: Peter Griffin <peter.griffin@xxxxxxxxxx> :::::: CC: Mauro Carvalho Chehab <mchehab@xxxxxxxxxxxxxxx> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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