RE: [PATCH 2/2] dt-bindings: pinctrl: add support for RZ/A1L

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Geert,

On Wednesday, October 04, 2017, Geert Uytterhoeven wrote:
> >  Required properties:
> >    - compatible
> > -    this shall be "renesas,r7s72100-ports".
> > +    this shall be "renesas,r7s72100-ports" for RZ/A1H and RZ/A1M or
> > +    "renesas,r7s72102-ports" for RZ/A1L
> 
> Shouldn't you also document "renesas,r7s72101-ports" for RZ/A1M?

I was wondering if you were going to ask for that.

I put "for RZ/A1H and RZ/A1M" in the DT documentation, but if you 
prefer, I can also just add to pinctrl-rza1.c:

static const struct of_device_id rza1_pinctrl_of_match[] = {
	{
		/* RZ/A1H */
		.compatible	= "renesas,r7s72100-ports",
		.data		= &rza1h_pmx_conf,
	},
+	{
+		/* RZ/A1M */
+		.compatible	= "renesas,r7s72101-ports",
+		.data		= &rza1h_pmx_conf,
+	},	{
		/* RZ/A1L */
		.compatible	= "renesas,r7s72102-ports",
		.data		= &rza1l_pmx_conf,
	},
	{ }
};



> You could use "renesas,r7s72100-ports" as a fallback property for RZ/A1M,
> though.

Do you mean in the DT? Or in pinctrl-rza1.c?

> BTW, is there a way to distinguish the various RZ/A1 SoCs at runtime?

Sadly there is not.

There is a unique ID number, but it is only accessible via JTAG 
externally.

Internally, you would have to look for registers that don't exist (for 
the RZ/A1L). But for RZ/A1H vs RZ/A1M, the only actual difference is the 
amount of RAM, so you would have to do a set-and-test method on RAM.


Chris

��.n��������+%������w��{.n�����{��
b���ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f




[Index of Archives]     [Linux SPI]     [Linux Kernel]     [Linux ARM (vger)]     [Linux ARM MSM]     [Linux Omap]     [Linux Arm]     [Linux Tegra]     [Fedora ARM]     [Linux for Samsung SOC]     [eCos]     [Linux Fastboot]     [Gcc Help]     [Git]     [DCCP]     [IETF Announce]     [Security]     [Linux MIPS]     [Yosemite Campsites]

  Powered by Linux