Am Mittwoch, 23. August 2017, 16:00:07 CEST schrieb David Wu: > The pins from GPIO1A0 to GPIO1B1 are special, need to recalculate > iomux. And the register offset is larger than the u8 range, so changed > to u32. > > Signed-off-by: David Wu <david.wu@xxxxxxxxxxxxxx> While I'm still struggling trying to understand why some chip-designer would move these iomux settings into the general SOC_CON registers, this matches the documentation for the rv1108, so Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx> Heiko -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] pinctrl: rockchip: Add rv1108 recalculated iomux support
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- Subject: Re: [PATCH v2] pinctrl: rockchip: Add rv1108 recalculated iomux support
- From: Heiko Stuebner <heiko@xxxxxxxxx>
- Date: Fri, 25 Aug 2017 11:23:17 +0200
- In-reply-to: <1503475207-30288-1-git-send-email-david.wu@rock-chips.com>
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