On Fri, Jun 23, 2017 at 2:29 PM, Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx> wrote: > From: Ken Ma <make@xxxxxxxxxxx> > > If north bridge selection register bit1 is clear, pins [10:8] are for > SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for > GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn > and CTSn, so bit1 should be added to uart2 group and it must be set > for both "gpio" and "uart" functions of uart2 group. > > Signed-off-by: Ken Ma <make@xxxxxxxxxxx> > Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx> Patch applied. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html