On 06/14/2017 03:18 PM, Krzysztof Kozlowski wrote: > When setting the pin function for external interrupts, the driver used > wrong IO memory address base. The pin function register is always under > pctl_base, not the eint_base. > > By updating wrong register, the external interrupts for chosen GPIO > would not work at all and some other GPIO might be configured to wrong > value. > > Platforms other than Exynos5433 should not be affected as eint_base > equals pctl_base in such case. > > Fixes: 8b1bd11c1f8f ("pinctrl: samsung: Add the support the multiple > IORESOURCE_MEM for one pin-bank") > Cc:<stable@xxxxxxxxxxxxxxx> > Reported-by: Tomasz Figa<tomasz.figa@xxxxxxxxx> > Signed-off-by: Krzysztof Kozlowski<krzk@xxxxxxxxxx> I've tested this patch by comparing GPFx_CON register values, as nothing seems to be currently using pins from the GPF1...GPF5 banks as external interrupts on TM2, the only board based on Exynos5433. I changed sii8620 interrupt-parent temporarily to &gpf1 and GPF1_CON got configured properly with the patch and improperly without the patch. I guess this can be considered as Tested-by: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> -- Thanks, Sylwester -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html