On Fri, May 26, 2017 at 9:20 AM, David Wu <david.wu@xxxxxxxxxxxxxx> wrote: > On the some rockchip SOCS, some things like rk3399 specific uart2 can use > multiple pins. Somewhere between the pin io-cells and the uart it seems > to have some sort of switch to decide to which pin to actually route the > data. > > +-------+ +--------+ /- GPIO4_B0 (pinmux 2) > > | uart2 | -- | switch | --- GPIO4_C0 (pinmux 2) > > +-------+ +--------+ \- GPIO4_C3 (pinmux 2) > (switch selects one of the 3 pins base on the GRF_SOC_CON7[BIT0, BIT1]) > > The routing switch is determined by one pin of a specific group to be set > to its special pinmux function. If the pinmux setting is wrong for that > pin the ip block won't work correctly anyway. > > Signed-off-by: David Wu <david.wu@xxxxxxxxxxxxxx> Patch applied with Heiko's ACK. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html