Re: [PATCH v2] pinctrl: cherryview: Add support for GMMR GPIO opregion

[Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>]

On Wed, 2017-03-22 at 16:38 +0100, Hans de Goede wrote:
> On some Cherry Trail devices the ASL uses the GMMR GPIO to access
> GPIOs so as to serialize MMIO accesses to GPIO registers with the
> OS, because:
> 
> "Due to a silicon issue, a shared lock must be used to prevent
> concurrent
> accesses across the 4 GPIO controllers.
> 
> See Intel Atom Z8000 Processor Series Specification Update (Rev. 005),
> errata #CHT34, for further information."
> 
> This commit adds support for this opregion, this fixes a number of
> ASL errors on my Ezpad mini3 tablet and makes the otg port device/host
> muxing which is controlled in firmware on this model work properly.
> 
> Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>

> +static acpi_status chv_pinctrl_mmio_access_handler(u32 function,
> +	acpi_physical_address address, u32 bits, u64 *value,
> +	void *handler_context, void *region_context)
> +{
> +	struct chv_pinctrl *pctrl = region_context;
> +	unsigned long flags;
> +	acpi_status ret = AE_OK;
> +
> +	raw_spin_lock_irqsave(&chv_lock, flags);
> +
> +	if (function == ACPI_WRITE)
> +		chv_writel((u32)(*value), pctrl->regs +
> (u32)address);
> +	else if (function == ACPI_READ)
> +		*value = readl(pctrl->regs + (u32)address);
> +	else
> +		ret = AE_BAD_PARAMETER;
> +
> +	raw_spin_unlock_irqrestore(&chv_lock, flags);
> +

> +	return AE_OK;

return ret;

Didn't notice before, sorry.

-- 
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy
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