Hi Linus, On ven., déc. 30 2016, Linus Walleij <linus.walleij@xxxxxxxxxx> wrote: > On Thu, Dec 22, 2016 at 6:24 PM, Gregory CLEMENT > <gregory.clement@xxxxxxxxxxxxxxxxxx> wrote: > >> Document the device tree binding for the pin controllers found on the >> Armada 37xx SoCs. >> >> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx> > (...) > >> +Required properties for pinctrl driver: >> +- compatible: "marvell,armada3710-sb-pinctrl" for the south bridge >> + "marvell,armada3710-nb-pinctrl" for the north bridge >> +- reg: The first set of register are for pinctrl/gpio and the second >> + set for the interrupt controller >> +- interrupts: list of the interrupt use by the gpio > > While this makes sense on its own, it doesn't match the code you sent. > > The code uses syscon and regmap inside a simple-mfd node, not reg. > > Please clarify how this works so we can see what is going on. > > The syscon part doesn't seem optional at all. OK done. > > Yours, > Linus Walleij -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html