Add pin configuration subnode for RIIC2 interface. Signed-off-by: Jacopo Mondi <jacopo+renesas@xxxxxxxxxx> --- arch/arm/boot/dts/r7s72100-genmai.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts index 569c86a..30992b1 100644 --- a/arch/arm/boot/dts/r7s72100-genmai.dts +++ b/arch/arm/boot/dts/r7s72100-genmai.dts @@ -44,6 +44,12 @@ renesas,pins = <PIN(3, 0) 6>, <PIN(3, 2) 4>; }; + + i2c2_pins: i2c2 { + /* RIIC2: P1_4 as SCL, P1_5 as SDA */ + renesas,pins = <PIN(1, 4) (1 | BI_DIR)>, + <PIN(1, 5) (1 | BI_DIR)>; + }; }; &extal_clk { @@ -62,6 +68,9 @@ status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + eeprom@50 { compatible = "renesas,24c128"; reg = <0x50>; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html