On 01/09/2017 11:36 AM, Linus Walleij wrote:
On Sat, Jan 7, 2017 at 12:22 AM, David Daney <ddaney.cavm@xxxxxxxxx> wrote:
From: David Daney <david.daney@xxxxxxxxxx>
Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
(...)
+Optional Properties:
+- compatible: "cavium,thunder-8890-gpio", unused as PCI driver binding is used.
+- interrupt-controller: Marks the device node as an interrupt controller.
+- #interrupt-cells: Must be present and have value of 2 if
+ "interrupt-controller" is present.
+ - First cell is the GPIO pin number relative to the controller.
+ - Second cell is triggering flags as defined in interrupts.txt.
AFAICT this device has an optional list of interrupts as well?
One per pin even?
I'm not sure I understand your question.
The GPIO hardware supports an interrupt on each pin. The underlying
interrupt mechanism is via PCI MSI-X, which are fully discoverable by
the driver, so lack of device tree binding for the these underlying
MSI-X is fully appropriate. On the other hand, users of the GPIO
interrupt pins need this "interrupt-controller" and "#interrupt-cells"
to be able to properly find and configure the proper interrupts.
I said the "interrupt-controller" property was optional, because some
systems don't use GPIO interrupts and can function without specifying
that it is also an interrupt controller.
Yours,
Linus Walleij
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