Re: [PATCH v3 5/5] gpio: pca953x: coding style fixes

[Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>]

On Wed, 2016-09-07 at 15:37 +0200, Bartosz Golaszewski wrote:
> pca953x_gpio_set_multiple() has some coding style issues that make it
> harder to read. Tweak the code a bit.
> 
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@xxxxxxxxxxxx>
> ---
>  drivers/gpio/gpio-pca953x.c | 19 ++++++++++---------
>  1 file changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
> index b08ed52..bbec5d7 100644
> --- a/drivers/gpio/gpio-pca953x.c
> +++ b/drivers/gpio/gpio-pca953x.c
> @@ -360,25 +360,26 @@ exit:
>  }
>  
>  static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
> -		unsigned long *mask, unsigned long *bits)
> +				      unsigned long *mask, unsigned
> long *bits)
>  {
>  	struct pca953x_chip *chip = gpiochip_get_data(gc);
>  	u8 reg_val[MAX_BANK];
> -	int ret;
> +	int ret, bank;
>  	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
> -	int bank;
> +	unsigned int bankmask, bankval;

I doubt it's the best representation. Can we use reversed xmas tree?
Also, I would not unify ret and bank on the same line.


>  
>  	memcpy(reg_val, chip->reg_output, NBANK(chip));
>  	mutex_lock(&chip->i2c_lock);
> -	for(bank=0; bank<NBANK(chip); bank++) {
> -		unsigned bankmask = mask[bank / sizeof(*mask)] >>
> -				    ((bank % sizeof(*mask)) * 8);
> -		if(bankmask) {
> -			unsigned bankval  = bits[bank /
> sizeof(*bits)] >>
> -					    ((bank % sizeof(*bits)) *
> 8);
> +	for (bank = 0; bank < NBANK(chip); bank++) {
> +		bankmask = mask[bank / sizeof(*mask)] >>
> +			   ((bank % sizeof(*mask)) * 8);
> +		if (bankmask) {
> +			bankval = bits[bank / sizeof(*bits)] >>
> +				  ((bank % sizeof(*bits)) * 8);
>  			reg_val[bank] = (reg_val[bank] & ~bankmask) |
> bankval;
>  		}
>  	}
> +
>  	ret = i2c_smbus_write_i2c_block_data(chip->client,
>  					     chip->offset->output <<
> bank_shift,
>  					     NBANK(chip), reg_val);

-- 
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy
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