On Tue, May 31, 2016 at 10:05 AM, Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> wrote: > The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive > strength control. Drive strength of some pins are controlled by > 3-bit width registers (8-level granularity). > > Signed-off-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> Patch applied. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 08/17] pinctrl: uniphier: support 3-bit drive strength control
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- Subject: Re: [PATCH 08/17] pinctrl: uniphier: support 3-bit drive strength control
- From: Linus Walleij <linus.walleij@xxxxxxxxxx>
- Date: Tue, 31 May 2016 12:46:46 +0200
- In-reply-to: <1464681923-7469-9-git-send-email-yamada.masahiro@socionext.com>
- References:
- [PATCH 00/17] pinctrl: uniphier: many clean-ups and support new pinctrl drivers
- From: Masahiro Yamada
- [PATCH 08/17] pinctrl: uniphier: support 3-bit drive strength control
- From: Masahiro Yamada
- [PATCH 00/17] pinctrl: uniphier: many clean-ups and support new pinctrl drivers
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