On Tue, Apr 05, 2016 at 11:00:50AM +0200, Linus Walleij wrote: > On Mon, Apr 4, 2016 at 11:40 PM, Mark Brown <broonie@xxxxxxxxxx> wrote: > > So this is mainly targeted at modules being added to base boards? > > Without getting into the binding at all here it seems like this is not > > solving the problem at the right abstraction level. It's exposing the > I have seen the same need beyond strictly embedded (MinnowBoard) > from the Intel camp. > These chips with funny Atom-specific codenames (baytrail, cherryview, > broxton, sunrisepoint etc) are not just used for these IoT use cases > but also for e.g. laptops of the ChromeBook form factor, and the same > pin control needs arise there, just at a different cadence related to > product cycle. Right, the chips are used in a broader space but in cases where they're being used in fixed systems where we don't have to deal with repaceable modules then the idiomatic thing for ACPI is to hide all the pinmuxing from the operating system. > I bet they also have funny product-specific kernel trees :( Yup, they do. > Agree: work is needed here. It is a big confusion, the whole model is > based around the configuration being pretty static as I recently > realized when just wanting to add a runtime-detected LCD panel > to a certain driver. No runtime patching of the DT or overlays or any > of the sort deliver what is really needed. Yes, funnily enough the CHIP people were just talking about that specific case at ELC yesterday (they patched u-boot to parse overlays so the kernel never sees the hotplug). > The only thing I heard which was actually doing something sensible > was when Matthew Garret once told that apple mice provide a > device tree fragment to the OS on how to handle it during bus > discovery. That's what people are doing with the BeagleBone/RPi/CHIP/96boards case - it's one of the primary usecases for DT overlays but currently everyone's final integration layer is out of tree. > > Obviously for the more general ACPI use case the idiomatic way of > > handling this is that the OS should never see anything about the > > pin muxing. With DT we need to really know what's going on with the > > pinbox because the model is that even for things built into a single > > board the OS is responsible for managing the pins but that's really not > > how ACPI is expected to work. > See my previous mail for some kind of answer to this. Yup, will reply there.
Attachment:
signature.asc
Description: PGP signature
