[ PATCH ] Bug 114711 - ubsan: "shift exponent 32 is too large" nouveau/nvkm/subdev/gpio/base.c:167:16

["Navin P.S" <navinp1912@xxxxxxxxx>]

Hi,

Please find the below patch that fixes "Bug 114711 - ubsan: "shift exponent 32 is too large" in drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c:167:16"
At runtime we shift 1 by 32 which is not correct since 1 is a signed integer. I make it unsigned and the maximum we shift is 32.


---
 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c
index d45ec99..cd28376 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c
@@ -164,7 +164,7 @@ static int
 nvkm_gpio_fini(struct nvkm_subdev *subdev, bool suspend)
 {
 	struct nvkm_gpio *gpio = nvkm_gpio(subdev);
-	u32 mask = (1 << gpio->func->lines) - 1;
+	u32 mask = (1U << (min(gpio->func->lines, 32))) - 1;
 
 	gpio->func->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0);
 	gpio->func->intr_stat(gpio, &mask, &mask);
-- 
2.5.0

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