Re: [PATCH 02/14] clk: sunxi: Add apb0 gates for A83T

[Chen-Yu Tsai <wens@xxxxxxxx>]

On Mon, Feb 1, 2016 at 11:02 PM, Rob Herring <robh@xxxxxxxxxx> wrote:
> On Sun, Jan 31, 2016 at 09:20:54AM +0800, Vishnu Patekar wrote:
>> APB0 is part of PRCM, and is compatible with earlier SOCs.
>> apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks.
>> This patch adds support for APB0 gates for A83T.
>>
>> Signed-off-by: Vishnu Patekar <vishnupatekar0510@xxxxxxxxx>
>> ---
>>  Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
>>  drivers/clk/sunxi/clk-simple-gates.c              | 2 ++
>>  2 files changed, 3 insertions(+)
>
> Acked-by: Rob Herring <robh@xxxxxxxxxx>

Acked-by: Chen-Yu Tsai <wens@xxxxxxxx>
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