Re: [PATCH v4 1/6] dt-bindings: clock: qcom: Add MSM8937 Global Clock Controller

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On March 17, 2025 10:17:46 AM GMT+01:00, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote:
>On Sat, Mar 15, 2025 at 03:57:35PM +0100, Barnabás Czémán wrote:
>> Add device tree bindings for the global clock controller on Qualcomm
>> MSM8937 platform.
>> 
>> Signed-off-by: Barnabás Czémán <barnabas.czeman@xxxxxxxxxxxxxx>
>> ---
>>  .../bindings/clock/qcom,gcc-msm8937.yaml           | 75 ++++++++++++++++++++++
>>  include/dt-bindings/clock/qcom,gcc-msm8917.h       | 17 +++++
>>  2 files changed, 92 insertions(+)
>> 
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8937.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8937.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..3c3f6756048e195671f542b3a6cd09057558eafa
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8937.yaml
>> @@ -0,0 +1,75 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8937.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Global Clock & Reset Controller on MSM8937
>> +
>> +maintainers:
>> +  - Barnabas Czeman <barnabas.czeman@xxxxxxxxxxxxxx>
>> +
>> +description: |
>> +  Qualcomm global clock control module provides the clocks, resets and power
>> +  domains on MSM8937.
>
>This is exactly like msm8953, so why it cannot be there?
>
Not exactly clock names are different, msm8953 have sleep msm8937 have sleep_clk.
>> +
>> +  See also::
>> +    include/dt-bindings/clock/qcom,gcc-msm8917.h
>
>typo, 8937
>
No
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,gcc-msm8937
>> +
>> +  clocks:
>> +    items:
>> +      - description: XO source
>> +      - description: Sleep clock source
>> +      - description: DSI phy instance 0 dsi clock
>> +      - description: DSI phy instance 0 byte clock
>> +      - description: DSI phy instance 1 dsi clock
>> +      - description: DSI phy instance 1 byte clock
>> +
>> +  clock-names:
>> +    items:
>> +      - const: xo
>> +      - const: sleep_clk
>> +      - const: dsi0pll
>> +      - const: dsi0pllbyte
>> +      - const: dsi1pll
>> +      - const: dsi1pllbyte
>> +
>> +required:
>> +  - compatible
>> +  - clocks
>> +  - clock-names
>> +  - '#power-domain-cells'
>> +
>> +allOf:
>> +  - $ref: qcom,gcc.yaml#
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/qcom,rpmcc.h>
>> +
>> +    clock-controller@1800000 {
>> +      compatible = "qcom,gcc-msm8937";
>> +      reg = <0x01800000 0x80000>;
>> +      #clock-cells = <1>;
>> +      #reset-cells = <1>;
>> +      #power-domain-cells = <1>;
>> +      clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
>> +               <&sleep_clk>,
>> +               <&dsi0_phy 1>,
>> +               <&dsi0_phy 0>,
>> +               <&dsi1_phy 1>,
>> +               <&dsi1_phy 0>;
>> +      clock-names = "xo",
>> +                    "sleep_clk",
>> +                    "dsi0pll",
>> +                    "dsi0pllbyte",
>> +                    "dsi1pll",
>> +                    "dsi1pllbyte";
>> +    };
>> +...
>> diff --git a/include/dt-bindings/clock/qcom,gcc-msm8917.h b/include/dt-bindings/clock/qcom,gcc-msm8917.h
>> index 4b421e7414b50bef2e2400f868ae5b7212a427bb..ec1f0b261dd5ccfe4896a00ffa9cf86de98b9cb3 100644
>> --- a/include/dt-bindings/clock/qcom,gcc-msm8917.h
>> +++ b/include/dt-bindings/clock/qcom,gcc-msm8917.h
>> @@ -170,6 +170,22 @@
>>  #define VFE1_CLK_SRC				163
>>  #define VSYNC_CLK_SRC				164
>>  #define GPLL0_SLEEP_CLK_SRC			165
>> +#define BLSP1_QUP1_I2C_APPS_CLK_SRC		166
>> +#define BLSP1_QUP1_SPI_APPS_CLK_SRC		167
>> +#define BLSP2_QUP4_I2C_APPS_CLK_SRC		168
>> +#define BLSP2_QUP4_SPI_APPS_CLK_SRC		169
>
>Why are you adding bindings to 8917? Nothing in commit msg explains
>that.
Because msm8917 driver was expanded with 8937 bits, i will expand the commit message.
>
>Best regards,
>Krzysztof
>





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