On Fri, Mar 14, 2025 at 12:44:50PM +0000, Lee Jones wrote: > On Fri, 07 Mar 2025, Raag Jadav wrote: > > > Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI > > devices that expose two different capabilities of GPIO and Timed I/O > > as a single PCI function through shared MMIO. ... > > + ret = pci_alloc_irq_vectors(pci, 2, 2, PCI_IRQ_ALL_TYPES); > > + if (ret < 0) > > + return ret; > > + > > + ret = mfd_add_devices(&pci->dev, PLATFORM_DEVID_AUTO, ehl_pse_gpio_devs, > > dev_*? devm_* ? > > + ARRAY_SIZE(ehl_pse_gpio_devs), pci_resource_n(pci, 0), > > + pci_irq_vector(pci, 0), NULL); > > + if (ret) > > + pci_free_irq_vectors(pci); Anyway, the choice as far as I understood it is motivated by usage of pci_*_irq_vector() APIs, which are officially not manageable (however in practice they are). > > + return ret; > > +} > > + > > +static void ehl_pse_gpio_remove(struct pci_dev *pdev) > > +{ > > + mfd_remove_devices(&pdev->dev); > > + pci_free_irq_vectors(pdev); > > +} Same here. -- With Best Regards, Andy Shevchenko