Re: [PATCH v6 1/4] dt-bindings: gpio: spacemit: add support for K1 SoC

[Rob Herring <robh@xxxxxxxxxx>]

On Sun, Feb 23, 2025 at 07:49:32PM +0800, Yixun Lan wrote:
> The GPIO controller of K1 support basic functions as input/output,
> all pins can be used as interrupt which route to one IRQ line,
> trigger type can be select between rising edge, falling edge, or both.
> There are four GPIO banks, each consisting of 32 pins.
> 
> Signed-off-by: Yixun Lan <dlan@xxxxxxxxxx>
> ---
>  .../devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 81 ++++++++++++++++++++++
>  1 file changed, 81 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..017165d325565a6868700a9ac8298b61dffcfef4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml
> @@ -0,0 +1,81 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SpacemiT K1 GPIO controller
> +
> +maintainers:
> +  - Yixun Lan <dlan@xxxxxxxxxx>
> +
> +description:
> +  The controller's registers are organized as sets of eight 32-bit
> +  registers with each set of port controlling 32 pins.  A single
> +  interrupt line is shared for all of the pins by the controller.
> +
> +properties:
> +  $nodename:
> +    pattern: "^gpio@[0-9a-f]+$"
> +
> +  compatible:
> +    const: spacemit,k1-gpio
> +
> +  reg:
> +    maxItems: 1
> +
> +  gpio-controller: true
> +
> +  "#gpio-cells":
> +    const: 3
> +    description:
> +      The first two cells are the GPIO bank index and offset inside the bank,
> +      the third cell should specify GPIO flag.
> +
> +  gpio-ranges: true
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 3
> +    description:
> +      The first two cells are the GPIO bank index and offset inside the bank,
> +      the third cell should specify interrupt flag. The controller does not
> +      support level interrupts, so flags of IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW
> +      should not be used. Refer <dt-bindings/interrupt-controller/irq.h> for valid flags.

Wrap lines at 80 chars.

> +
> +required:
> +  - compatible
> +  - reg
> +  - gpio-controller
> +  - "#gpio-cells"
> +  - interrupts
> +  - interrupt-controller
> +  - "#interrupt-cells"
> +  - gpio-ranges
> +
> +additionalProperties: false
> +
> +dependencies:
> +  interrupt-controller: [ interrupts ]

You made 'interrupts' always required, so this is redundant.

> +
> +examples:
> +  - |
> +    gpio: gpio@d4019000 {

Drop unused labels.

> +      compatible = "spacemit,k1-gpio";
> +      reg = <0xd4019000 0x800>;
> +      gpio-controller;
> +      #gpio-cells = <3>;
> +      interrupts = <58>;
> +      interrupt-controller;
> +      interrupt-parent = <&plic>;
> +      #interrupt-cells = <3>;
> +      gpio-ranges = <&pinctrl 0 0 0 32>,
> +                    <&pinctrl 1 0 32 32>,
> +                    <&pinctrl 2 0 64 32>,
> +                    <&pinctrl 3 0 96 32>;
> +    };
> +...
> 
> -- 
> 2.48.1
>