Hi Yixun, On Mon, Feb 17, 2025 at 1:58 PM Yixun Lan <dlan@xxxxxxxxxx> wrote: > The GPIO controller of K1 support basic functions as input/output, > all pins can be used as interrupt which route to one IRQ line, > trigger type can be select between rising edge, failing edge, or both. > There are four GPIO banks, each consisting of 32 pins. > > Signed-off-by: Yixun Lan <dlan@xxxxxxxxxx> (...) > + gpio-ranges = <&pinctrl 0 0 32>, > + <&pinctrl 0 32 32>, > + <&pinctrl 0 64 32>, > + <&pinctrl 0 96 32>; In my core patch I assume that we encode the gpiochip instance number also into the ranges: <&pinctrl 0 0 0 32>, <&pinctrl 1 0 64 32> etc. Yours, Linus Walleij