Hi Claudiu, On Wed, Nov 13, 2024 at 2:36 PM Claudiu <claudiu.beznea@xxxxxxxxx> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > > The SSI IP variant present on the Renesas RZ/G3S SoC is similar to the > one found on the Renesas RZ/G2{UL, L, LC} SoCs. Add documentation for > it. > > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> Thanks for your patch! > --- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml > +++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml > @@ -19,6 +19,7 @@ properties: > - renesas,r9a07g043-ssi # RZ/G2UL and RZ/Five > - renesas,r9a07g044-ssi # RZ/G2{L,LC} > - renesas,r9a07g054-ssi # RZ/V2L > + - renesas,r9a08g045-ssi # RZ/G3S > - const: renesas,rz-ssi This part is fine. The section about the dmas properties also needs an update, as the documented MID/RID values do not apply to RZ/G3S. I recommend just dropping the list of values. People should look them up in the hardware documentation. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds