Re: [PATCH 2/2] gpio: 74x164: Use a single SPI transfer instead of multiple transfers

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Mon, Nov 30, 2015 at 3:35 PM, Geert Uytterhoeven
<geert+renesas@xxxxxxxxx> wrote:

> Currently the 74x164 driver assembles an SPI message from an array of
> one-byte SPI transfers, one for each daisy-chained shift register, as
> the first byte sent will end up in the last register.
> This array is allocated and deallocated on each GPIO write access.
>
> By storing the data in the internal buffer in reverse order, we can
> use a single SPI transfer with the internal buffer directly, simplifying
> the code a lot, and avoiding memory (de)allocations.
>
> This also avoids transient values on the GPIO outputs when using an SPI
> master that cannot keep the hardware chip select asserted in between
> multiple transfers (and would need cs-gpios for proper operation).
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> Cc: Mark Brown <broonie@xxxxxxxxxx>

Patch rebased and applied. (Accounting for .dev -> .parent refactoring.)

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-gpio" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html