On Fri, Aug 30, 2024 at 11:40:44AM +0800, Billy Tsai wrote: > The AST2700 is the 7th generation SoC from Aspeed, featuring two GPIO > controllers: one with 12 GPIO pins and another with 216 GPIO pins. > > Signed-off-by: Billy Tsai <billy_tsai@xxxxxxxxxxxxxx> > --- > .../bindings/gpio/aspeed,ast2400-gpio.yaml | 46 ++++++++++++++++++- > 1 file changed, 45 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml > index cf11aa7ec8c7..4d439972c14b 100644 > --- a/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml > +++ b/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml > @@ -15,6 +15,7 @@ properties: > - aspeed,ast2400-gpio > - aspeed,ast2500-gpio > - aspeed,ast2600-gpio > + - aspeed,ast2700-gpio > > reg: > maxItems: 1 > @@ -42,7 +43,7 @@ properties: > const: 2 > > ngpios: > - minimum: 36 > + minimum: 12 > maximum: 232 Aren't you missing a corresponding update to gpio-line-names, which has a minimum of 36?
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