On Mon, Aug 05, 2024 at 10:11:09AM +0200, Linus Walleij wrote: > Hi Conor, > > thanks for your patch! > > On Tue, Jul 23, 2024 at 1:28 PM Conor Dooley <conor.dooley@xxxxxxxxxxxxx> wrote: > > > Since the interrupt mux is going to provide us a 1:1 mapping for > > interrupts, and it is no longer correct to hit all of the set bits in > > the interrupt handler, store the GPIO that "owns" an interrupt in its > > data pointer, so that we can determine which bit to clear. > > > > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > I don't quite get this, the irqchip of the GPIO is clearly hard-coded > hierarchical, then why don't you: > > select IRQ_DOMAIN_HIERARCHY > > And use e.g. girq->child_to_parent_hwirq() to handle the > hierarchy? > > See drivers/gpio/gpio-ixp4xx.c for a simple example of a hierarchical > GPIO interrupt controller. Cool, I'll check that out. I've got some re-figuring out of the interrupt controller to do given Thomas' comment there. Maybe the combination will solve the horrible % 32 hack... Cheers, Conor.
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