On Wed, Jun 19, 2024 at 11:36 PM Andri Yngvason <andri@xxxxxxxxxxx> wrote: > mið., 19. jún. 2024 kl. 19:18 skrifaði Andy Shevchenko > <andy.shevchenko@xxxxxxxxx>: > > On Wed, Jun 19, 2024 at 2:31 PM Andri Yngvason <andri@xxxxxxxxxxx> wrote: > > > I'm trying to use GPIO on an Alder Lake U processor with a ACPI device > > > id INTC1055. > > > > > > Commit 0e793a4e283487378e9a5b7db37bc1781bc72fd7 added this device id > > > to drivers/pinctrl/intel/pinctrl-tigerlake.c and states that Alder > > > Lake P uses the same PCH. However, I am having a very hard time > > > matching pin names from the schematics that I was given with names in > > > the source file or with names from the dataheet for P-PCH 500. > > > > > > Based on Intel's web page [1], I have been able to ascertain that > > > Alder Lake U has P-PCH 600, for which the pin names in the datasheet > > > do indeed match what I see on my schematics. > > > > > > Is it correct to conclude that this is simply wrong as is? > > > > TL:DR; Do you have any issues in practice with any of the GPIOs on > > this board? If not, then there are no problems with the code :-) > > > > The Linux ideology of device drivers is to avoid code duplication. > > Since we have the same IP, we reuse the driver, however in the > > original one the pin names were used for different PCH. So, if the > > issue is only with the naming, you need to find a mapping between > > schematics and the standard form of GPP_X_nn (where 'X' is a group > > name, and 'nn' is the relative number of the pin) that is used in all > > of those chips. You may follow the comments in the code which starts > > the groups of pins followed by the pin names and numbers. As long as > > you know the basic (or "normalized") form of the pin you may easily > > associate it with Linux pin number via the source of the driver. > > Thanks. I can work with that. > > Maybe you've already thought of this, but if the pins all used the > canonical names in the first place, they'd be correct for any PCH with > the same IP. Of course, you can't change it now, but it's an idea for > future pinctrls. Thank you for your input, that's what has been already implemented in pinctrl-intel-platform.c for the SoC and PCH starting from Intel Lunar Lake. -- With Best Regards, Andy Shevchenko