Re: [PATCH 01/11] dt-bindings: pinctrl: Optional DT property to support pin mappings

[Rob Herring <robh+dt@xxxxxxxxxx>]

On Mon, Oct 19, 2015 at 12:43 AM, Pramod Kumar <pramodku@xxxxxxxxxxxx> wrote:
> If GPIO controller's pins are muxed, pin-controller subsystem
> need to be intimated by defining mapping between gpio and
> pinmux controller. This patch adds required properties to
> define this mapping via DT.
>
> Signed-off-by: Pramod Kumar <pramodku@xxxxxxxxxxxx>
> Reviewed-by: Ray Jui <rjui@xxxxxxxxxxxx>
> Reviewed-by: Scott Branden <sbranden@xxxxxxxxxxxx>

Acked-by: Rob Herring <robh@xxxxxxxxxx>

> ---
>  .../devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt         | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt
> index 6540ca5..25a5002 100644
> --- a/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt
> @@ -26,9 +26,13 @@ Optional properties:
>  - interrupt-controller:
>      Specifies that the node is an interrupt controller
>
> -- pinmux:
> -    Specifies the phandle to the IOMUX device, where pins can be individually
> -muxed to GPIO
> +- gpio-ranges:
> +    Specifies the mapping between gpio controller and pin-controllers pins.
> +    This requires 4 fields in cells defined as -
> +    1. Phandle of pin-controller.
> +    2. GPIO base pin offset.
> +    3  Pin-control base pin offset.
> +    4. number of gpio pins which are linearly mapped from pin base.
>
>  Supported generic PINCONF properties in child nodes:
>
> @@ -78,6 +82,8 @@ Example:
>                 gpio-controller;
>                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
>                 interrupt-controller;
> +               gpio-ranges = <&pinctrl 0 42 1>,
> +                               <&pinctrl 1 44 3>;
>         };
>
>         /*
> --
> 1.9.1
>
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