Re: [PATCH] gpio: Add driver for MEN 16Z127 GPIO controller

[Andreas Werner <andy@xxxxxxxxxxxxx>]

Hi,
i have an additional question regarding the Open Drain setting.

The register is currently impelemented as a read/write register
which means the pin mode is configurable by software to
Push Pull or Open Drain.

There is also the possiblity (normal way) that the HW (FPGA) configures
each pin to the correct mode.

Is there actually a way to set an output mode from userland or by the gpio API?
I did not find anything about that.


If there is no way, i will implement it without software control. I just
read out the mode configuration and handle the pins as PP or Open Drain.

Regards
Andy
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