2015-06-23 18:18 GMT+08:00 Jun Nie <jun.nie@xxxxxxxxxx>: > 2015-06-23 18:14 GMT+08:00 Tony Lindgren <tony@xxxxxxxxxxx>: >> * Jun Nie <jun.nie@xxxxxxxxxx> [150623 02:56]: >>> 2015-06-17 15:17 GMT+08:00 Tony Lindgren <tony@xxxxxxxxxxx>: >>> > * Jun Nie <jun.nie@xxxxxxxxxx> [150616 18:58]: >>> >> + if (pcs->bits_per_mux) { >>> >> + int pin_pos, byte_num, num_pins_in_register; >>> >> + >>> >> + num_pins_in_register = pcs->width / pcs->bits_per_pin; >>> >> + byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE; >>> >> + offset = (byte_num / mux_bytes) * mux_bytes; >>> >> + pin_pos = pin % num_pins_in_register; >>> >> + pin_pos *= pcs->bits_per_pin; >>> >> + data = pcs->read(pcs->base + offset) & >>> >> + ~(pcs->fmask << pin_pos); >>> > >>> > Should you check the pcs->fmask here too in case some bits are reserved? >>> > >>> Did not catch your idea? Those bits set in fmask are dedicated for one >>> pin mux control and should be clear before set as desired value per my >>> understanding. Do you mean some bits may be reserved and not for any >>> function? >> >> Right, can you please check that we don't try to write to reserved >> bits in the hardawre if the mask is set? > Then I have question that how can I know what bits is for function > mask, what bits are for reserved? Do we have any other value to > indicate it? I did not find it in one register for one pin mux case. Tony, Could you help elaborate this? Thanks! > >> >> Regards, >> >> Tony -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html