Re: [PATCH 5/6] ARM: shmobile: lager: Set sdhi and mmcif clock rates

[Ben Hutchings <ben.hutchings@xxxxxxxxxxxxxxx>]

On Sun, 2015-05-17 at 10:13 +0200, Geert Uytterhoeven wrote:
> On Sun, May 17, 2015 at 2:29 AM, Ben Hutchings
> <ben.hutchings@xxxxxxxxxxxxxxx> wrote:
> > From: Ben Dooks <ben.dooks@xxxxxxxxxxxxxxx>
> >
> > [bwh: Fold in fix from Ian Molton]
> > Signed-off-by: Ben Hutchings <ben.hutchings@xxxxxxxxxxxxxxx>
> > ---
> >  arch/arm/boot/dts/r8a7790-lager.dts |   11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
> > index aaa4f258e279..343ec0ccc8df 100644
> > --- a/arch/arm/boot/dts/r8a7790-lager.dts
> > +++ b/arch/arm/boot/dts/r8a7790-lager.dts
> > @@ -413,6 +413,11 @@
> >         vmmc-supply = <&fixedregulator3v3>;
> >         bus-width = <8>;
> >         non-removable;
> > +
> > +       assigned-clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
> > +       assigned-clock-rates = <97500000>;
> > +       max-frequency = <50000000>;
> 
> Are all these properties Lager-specific, or r8a7790-specific?
> If the latter, they belong in r8a7790.dtsi.
> Same comment for the other nodes.

The clock assignments are not specific to Lager so they probably belong
in r8a7790.dtsi; the dividers are configurable and could be
board-specific.

The board design could conceivably limit the usable frequency to below
the chip's maximum, though presumably that won't usually happen.
Currently the clk-rcar-gen2 driver only configures the dividers for
sdhi{0,1}.  That leaves the rest of them effectively controlled by the
board's firmware.

Ben.


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