From: Joonwoo Park <joonwoop@xxxxxxxxxxxxxx> On newer TLMM hardware blocks the registers are spread and we need an offsets upper than 16 bits to address them. Increase the register offset variables to 32 bits size. Signed-off-by: Joonwoo Park <joonwoop@xxxxxxxxxxxxxx> Signed-off-by: Stanimir Varbanov <svarbanov@xxxxxxxxxx> Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxxxxxx> --- drivers/pinctrl/qcom/pinctrl-msm.h | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index b952c4b..54fdd04 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -70,11 +70,11 @@ struct msm_pingroup { unsigned *funcs; unsigned nfuncs; - s16 ctl_reg; - s16 io_reg; - s16 intr_cfg_reg; - s16 intr_status_reg; - s16 intr_target_reg; + u32 ctl_reg; + u32 io_reg; + u32 intr_cfg_reg; + u32 intr_status_reg; + u32 intr_target_reg; unsigned mux_bit:5; -- 1.7.0.4 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html