[PATCH 1/3] pinctrl: qcom: increase variable size for register addresses

[Stanimir Varbanov <svarbanov@xxxxxxxxxx>]

From: Joonwoo Park <joonwoop@xxxxxxxxxxxxxx>

Newer MSM SoCs have TLMM hardware block upper than 16 bit.  Increase to
32 bit registers to hold addresses correctly.

Signed-off-by: Joonwoo Park <joonwoop@xxxxxxxxxxxxxx>
Signed-off-by: Stanimir Varbanov <svarbanov@xxxxxxxxxx>
---
 drivers/pinctrl/qcom/pinctrl-msm.h |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
index b952c4b..54fdd04 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -70,11 +70,11 @@ struct msm_pingroup {
 	unsigned *funcs;
 	unsigned nfuncs;
 
-	s16 ctl_reg;
-	s16 io_reg;
-	s16 intr_cfg_reg;
-	s16 intr_status_reg;
-	s16 intr_target_reg;
+	u32 ctl_reg;
+	u32 io_reg;
+	u32 intr_cfg_reg;
+	u32 intr_status_reg;
+	u32 intr_target_reg;
 
 	unsigned mux_bit:5;
 
-- 
1.7.0.4

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